Field-Based Error Protection in Integrated Circuit Data Transfers

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Solution Overview

Problem

Data integrity issues arise during transfers between components on integrated circuits (ICs) due to component failures and high-energy particle interference, necessitating improved error detection and response mechanisms beyond traditional byte-based error codes.

Innovation Solution

Implementing error codes based on fields of data rather than consecutive signal bits, allowing for differentiated error responses tailored to the criticality of each data field, enabling targeted error handling and transaction management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional byte-based error codes are used for data transfer, then error detection capability is provided, but error response granularity is limited and system resets are required for critical errors

Engineering Contradiction:
Improveerror detection precisionVSAvoiderror response complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the data transfer into distinct fields (address field, write data field, read data field, etc.) and applies field-based error codes to each segment. This allows independent error detection and response for each field, eliminating the need for system resets when non-critical errors occur in specific fields while maintaining overall system operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements differentiated error response levels (first response level for non-critical errors, second response level for critical errors) based on the specific field where the error occurs. This local quality approach allows the system to provide appropriate error handling tailored to each field's criticality rather than applying a uniform error response across all data.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If field-based error codes are implemented, then differentiated error responses are enabled, but error code complexity increases

Engineering Contradiction:
Improveerror response adaptabilityVSAvoiderror code structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal error code structure that can be applied across multiple field types (address fields, write data fields, read data fields) with a consistent format. Each field-based error code contains a response level indicator that universally signals the appropriate error response, making the system adaptable to different field types without requiring separate error handling mechanisms for each.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If data transfer reliability is enhanced through error checking, then data integrity is improved, but transfer overhead increases

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoiderror checking time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent generates field-based error codes at the source before data transfer, and the receiving circuit immediately checks these codes upon receipt. This preliminary action approach allows error detection to occur as part of the normal transfer process rather than requiring additional verification steps, minimizing time overhead while maintaining high reliability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250258224A1Integrated circuits including error protection of fields in transferred information and field-based error signals and related methods
Publication Date: 2025.08.14 AMPERE COMPUTING LLC
  • US20250258224A1 patent drawing
  • US20250258224A1 patent drawing
  • US20250258224A1 patent drawing

AI summary

An integrated circuit (IC) employs error codes based on fields of data for protecting data transferred from a first circuit to a second circuit on the IC. Each bit of a generated error code is based on one or more fields of the data rather than on consecutive signal bits of a bus. Upon receiving the data in a second circuit, the error code is employed to determine whether the data has been transferred without an error. In case of an error, a response circuit generates an error signal having an error type corresponding to the data fields in which errors are detected. In some examples, the transferred data comprises a transaction request and the error signal indicates whether 10 the transaction request has failed, the transaction request may be retried, or the transaction request may be completed despite the error.