Integrated Circuit Pattern Clustering With Latent Variables

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Solution Overview

Problem

The increasing complexity of semiconductor processes makes it impractical to thoroughly analyze and verify every pattern in integrated circuits, necessitating a more efficient and accurate method for pattern analysis and verification.

Innovation Solution

A method and system for pattern clustering in integrated circuits using machine learning models to generate latent variables and group patterns based on Euclidean distances, allowing for efficient analysis and verification by clustering patterns with similar attributes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If every pattern in integrated circuits is analyzed and verified individually, then analysis accuracy is improved, but analysis time and computational resources increase significantly

Engineering Contradiction:
Improvepattern analysis accuracyVSAvoidanalysis time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments patterns into multiple clusters based on geometric attributes such as area, aspect ratio, and orientation. By dividing the large set of patterns into smaller clusters, the analysis time is reduced while maintaining accuracy through representative pattern selection within each cluster.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of analyzing every pattern exhaustively, the patent performs partial analysis by selecting representative patterns from each cluster. This partial action approach significantly reduces analysis time while still providing sufficient accuracy for design verification.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If every pattern in integrated circuits is analyzed and verified individually, then analysis completeness is improved, but computational complexity increases significantly

Engineering Contradiction:
Improveanalysis completenessVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments patterns into clusters based on geometric attributes, reducing computational complexity by processing clusters rather than individual patterns. This segmentation maintains analysis completeness through strategic selection of representative patterns from each cluster.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes parameters by selecting representative patterns based on geometric attributes (area, aspect ratio, orientation) rather than processing all patterns. This parameter change approach reduces computational complexity while maintaining reliability through attribute-based representation.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If patterns are clustered based on multiple geometric attributes, then pattern representation accuracy is improved, but clustering computation time increases

Engineering Contradiction:
Improvepattern representation accuracyVSAvoidclustering computation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent uses multiple geometric parameters (area, aspect ratio, orientation) to define pattern clusters, improving representation accuracy. The computation time is managed by efficiently calculating these parameters and using them for cluster assignment.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary calculations of geometric attributes (area, aspect ratio, orientation) before clustering. This preliminary action prepares the data in advance, making the actual clustering process more efficient while maintaining high representation accuracy.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12430880B2Method and system performing pattern clustering
Publication Date: 2025.09.30 SAMSUNG ELECTRONICS CO LTD
  • US12430880B2 patent drawing
  • US12430880B2 patent drawing
  • US12430880B2 patent drawing

AI summary

A method of clustering patterns of an integrated circuit includes; providing a pattern image and numeric data, as input data corresponding to a first pattern to a first model, wherein the first model is trained by a plurality of sample images and a plurality of sample values, obtaining a content latent variable using the first model, and grouping a plurality of content latent variables corresponding to a plurality of patterns into a plurality of clusters based on a Euclidean distance, wherein the numeric data represents at least one attribute of the first pattern.