Integrated Circuit Memory Cells for Fluid Ejection Die Area Efficiency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing fluid ejection dies, such as thermal inkjet dies, are inefficient in terms of area usage due to the inclusion of non-storage circuitry for small memories, making them area inefficient.
Innovation Solution
Integrated circuits with memory cells corresponding to fluid actuation devices, where the same circuit logic is used to activate either selected fluid actuation devices or access selected corresponding memory cells based on received addresses and nozzle data, allowing data to be read out through a single contact pad and memory cells to be distributed along the length of the integrated circuit adjacent to the corresponding fluid actuation devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-storage circuitry is included for small memories on fluid ejection dies, then memory functionality is achieved, but area efficiency deteriorates
Solution Approach 1:
The circuit logic is designed to perform dual functions: activating fluid actuation devices and accessing memory cells. By using the same circuit paths and control logic for both operations, the patent eliminates the need for separate non-storage circuitry, thereby improving area efficiency while maintaining full memory functionality.
Solution Approach 2:
The patent combines the fluid actuation circuitry and memory access circuitry into a single integrated structure. The same data lines, address lines, and control logic serve both the fluid actuation devices and the memory cells, merging previously separate functions into one efficient system that reduces overall die area.
2Area of stationary object
If memory cells are distributed along the length of the integrated circuit, then area efficiency is improved, but circuit complexity increases
Solution Approach 1:
The memory cells are segmented and distributed along the length of the integrated circuit rather than being concentrated in one location. This segmentation allows for efficient use of die area while the shared circuit logic simplifies the overall circuit design by avoiding the need for separate access paths for each memory segment.
Solution Approach 2:
Instead of organizing memory cells in a traditional two-dimensional array, the patent distributes them along the length (one dimension) of the integrated circuit. This dimensional reorganization improves area utilization while the shared control logic maintains circuit simplicity.
3Area of stationary object
If the same circuit logic is used for both fluid actuation and memory access, then area efficiency is improved, but reliability may deteriorate
Solution Approach 1:
The circuit logic is designed to dynamically switch between two operational modes: fluid actuation mode and memory access mode. By using control signals to dynamically reconfigure the same circuit paths for different functions, the patent achieves area efficiency while maintaining reliability through proper mode management and signal control.
Solution Approach 2:
Control logic and address decoding circuits serve as intermediaries that manage the dual functionality. These intermediary components ensure that the same physical circuit paths are correctly routed to either fluid actuation devices or memory cells based on the operational mode, preventing signal conflicts and maintaining system reliability.
Data Source
Figure 1A
Figure 1B
Figure 2
AI summary
An integrated circuit comprising an elongate substrate having a length, a thickness, and a width, the length being at least twenty times the width. On the elongate substrate there is provided a plurality of nozzles arranged in a column along the length of the elongate substrate, a plurality of memory cells arranged adjacent to the plurality of nozzles, each memory cell corresponding to a nozzle, and fluid actuation logic to either eject fluid from selected nozzles or access memory cells corresponding to the selected nozzles.