Integrated Circuit Pointed Elements via Low-Thermal-Budget Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for forming tips in integrated circuits are limited to the Front End Of Line (FEOL) part and require a significant thermal budget, which restricts their application and material choice.
Innovation Solution
A method for producing tips in both the FEOL and Back End Of Line (BEOL) parts of integrated circuits using etching of two materials with different etchability, allowing adjustment of crater depth and width without a substantial thermal budget, enabling tips formation at any site with various materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional oxidation method is used to form tips on polysilicon, then tips can be formed in FEOL part, but significant thermal budget is required and application is limited to polysilicon regions
Solution Approach 1:
The patent replaces the thermal oxidation process with a chemical etching process. Instead of using high-temperature oxidation to form tips on polysilicon, the invention uses selective chemical etching of a sacrificial material (such as BARC layers, resins, or carbonaceous layers) to create craters that form tips. This substitution eliminates the need for significant thermal budget while enabling tip formation on various materials including metals and polysilicon in both FEOL and BEOL regions.
Solution Approach 2:
The patent changes the fundamental process parameter from thermal (oxidation temperature) to chemical (etch selectivity). By using etchants with different selectivities to etch the sacrificial material at different rates, the process controls tip dimensions through chemical parameters rather than thermal parameters. This allows tip formation at lower temperatures while maintaining versatility across different materials and circuit regions.
2Adaptability or versatility
If conventional oxidation method is used, then tips can be formed, but the method is limited to FEOL part and requires polysilicon material
Solution Approach 1:
The patent creates a universal tip formation process that can be applied across multiple contexts: FEOL and BEOL regions, different materials (polysilicon, metals, etc.), and various circuit functions. The sacrificial material layer approach serves multiple purposes: it protects underlying structures during etching, enables selective removal to create craters, and can be removed afterward to release the pointed region. This multi-functional approach simplifies manufacturing by providing a single process paradigm for diverse applications.
Solution Approach 2:
The sacrificial material (BARC layers, resins, or carbonaceous layers) acts as an intermediary between the etching process and the final tip structure. This intermediary layer is selectively etched to create craters, which then define the tip geometry. The sacrificial material protects the underlying substrate during selective etching and can be completely removed after crater formation, leaving the desired pointed structure without requiring direct etching of the final material.
3Manufacturing precision
If etching of two materials is used to form crater, then precise control of crater depth and width is achieved, but additional etching steps are required
Solution Approach 1:
The patent applies different etching conditions to different regions of the sacrificial material layer. By using etchants with different selectivities or applying etching locally to specific areas, the process creates craters with precise control over depth and width. The local quality approach allows selective removal of the sacrificial material in specific patterns, enabling precise crater formation while maintaining the overall process structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the formation of tips with precise dimensions and reduced thermal stress, facilitating applications in capacitors, mechanical switching systems, and orientation detection systems within integrated circuits.
Implementation Method 1
an etching of the first material and of the second material so as to form an open crater in the concave part and thus to form a pointed region of the element
Data Source
AI summary
A method for detecting orientation of an integrated circuit is disclosed. The method includes moving, in response to a gravitational force, a mobile metallic piece in an evolution zone of a housing. The housing is formed in an interconnect region of the integrated circuit. The housing includes walls defining the evolution zone. The walls are formed within multiple metallization levels of the interconnect region. The walls include a floor wall and a ceiling wall. At least one of the floor wall and ceiling wall incorporate a pointed element directing its pointed region towards the mobile metallic piece. The pointed element delimits an open crater in a concave part of a projection. The method further includes creating an electrical signal by movement of the mobile metallic piece at a plurality of electrically conducting elements positioned at boundary points of the evolution zone and detecting the electrical signal by a detector.


