Integrated Circuit Resistive Network for Compute-in-Memory
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Solution Overview
Problem
Traditional computing systems face performance and energy bottlenecks due to data movement between processors and memory, particularly in applications like neural network processing, where existing memory technologies are not optimized for computational tasks.
Innovation Solution
An integrated circuit with a resistive network comprising high-resistance contacts between conductors, configured as a current or voltage divider, and a semiconductor switch for routing electrical currents based on control bits, enabling efficient computational tasks like multiplication and signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional memory technologies are used separate from the processor, then data storage capacity is improved, but data movement between processor and memory creates performance and energy bottlenecks
Solution Approach 1:
The patent combines memory storage functionality with computational functionality by integrating resistive network circuits directly into the memory architecture. The memory device performs both data storage and arithmetic operations (multiplication, addition, subtraction) through the resistive network, eliminating the need for separate processor-memory data movement and enabling compute-in-memory operations.
Solution Approach 2:
The memory device is designed to perform multiple functions: storing data, performing arithmetic operations through the resistive network, and outputting results. The same physical structure serves as both storage medium and computational unit, allowing the system to execute computational tasks directly within memory without requiring external processor intervention for basic arithmetic operations.
2Productivity
If data movement between processor and memory is increased to handle larger datasets, then data processing capability is improved, but energy consumption increases
Solution Approach 1:
The memory device performs computational operations autonomously using its own stored data and the resistive network circuitry. The arithmetic operations are executed within the memory structure itself using the stored charge and resistive elements, eliminating the need to fetch data back to the processor for computation and reducing energy consumption associated with data movement.
3Productivity
If new memory technologies like ReRAM, PCM, MRAM are used for CIM, then computational performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent utilizes the resistance parameter of the resistive network elements to encode computational information and perform arithmetic operations. By changing the resistance values of the resistive elements (through programmed states), the system achieves computational functionality. This approach leverages existing semiconductor manufacturing processes while introducing resistive network elements that can be integrated using standard CMOS or complementary CMOS techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves memory speed, endurance, and energy efficiency by integrating computational functions within the memory, reducing the need for data movement and enabling area-efficient, low-power processing architectures.
Implementation Method 1
a resistive network comprising a first resistance element having a first resistance value and a second resistance element having a second resistance value, each resistance element of the resistive network being provided by one or more high-resistance contacts between conductors of the integrated circuit
Data Source
AI summary
An apparatus is disclosed, comprising means for providing in an integrated circuit a resistive network comprising a first resistance element having a first resistance value and a second resistance element having a second resistance value, each resistance element of the resistive network being provided by one or more high-resistance contacts between conductors of the integrated circuit. The apparatus may also provide a means for providing in the integrated circuit an electrical current from the resistive network to one of a summing node output and a subtraction node output for input to a corresponding summing node input and a subtraction node input of a signal processing component. A method for forming such an integrated circuit is also disclosed.