Integrated Circuit Layout Via Optimization for Electromigration Control
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Solution Overview
Problem
Existing integrated circuit designs face challenges with electromigration issues in power rails due to high utilization and thin metal wires, leading to increased difficulty in routing resources and potential design violations.
Innovation Solution
An optimizing method and device that identify power rails and domains, perform design rule checks, simulate current and voltage, and adjust via densities to correct electromigration violations by replacing or adding vias, ensuring current distribution without violating design rules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If more routing resources are used for power rails (increasing width), then electromigration impact is reduced, but routing resources for signal routing decrease and design difficulty increases
Solution Approach 1:
The patent applies local quality by adjusting via density specifically in regions where electromigration violations occur, rather than uniformly increasing power rail width across the entire circuit. The system identifies violation locations through simulation and selectively modifies via configurations only in those critical areas, leaving other regions unchanged to preserve routing resources.
Solution Approach 2:
The patent changes the parameter of via density (number of vias per unit area) in power rails to address electromigration issues. By increasing via density in specific regions where violations are detected, the system reduces current stress on individual vias without changing the overall power rail width or consuming additional routing resources.
2Reliability
If via density is increased to reduce electromigration violations, then electromigration impact decreases, but routing complexity and design difficulty increase
Solution Approach 1:
The patent performs preliminary simulation and design rule checking before finalizing the layout to identify potential electromigration violation points. By detecting these issues in the design phase and addressing them through automated via density adjustment, the system avoids the need for complex manual corrections and iterative redesigns later in the process.
Solution Approach 2:
The system performs self-service by automatically identifying electromigration violation points through simulation, calculating the required via density adjustments, and implementing the corrections without requiring manual intervention. The automated process analyzes current distributions, identifies problematic regions, and modifies via configurations independently.
Data Source
AI summary
An optimizing method, device and non-transient computer readable medium for an integrated circuit layout are provided. The method includes: identifying power rails and corresponding power supply domains in an integrated circuit design file; performing design rule check for circuit units in the integrated circuit design file to calculate a plurality of usable regions; determining electromigration violation points corresponding to the power rails and related current information; defining, according to the electromigration violation points and the current information, paths to be corrected on the power rails corresponding to the electromigration violation points; replacing types of vias on the power rails that do not overlap with the paths to be corrected; and correcting a number of the vias on the power rails that overlap with the paths to be corrected to reduce a number of the electromigration violation points.