Integrated Display Pixel Circuit for Ultrasonic Fingerprint Sensing

The patent merges the ultrasonic echo acquisition circuit and light emitting circuit into a shared pixel circuit structure. Both circuits use common components including switches (first switch coupled to EM signal, second switch coupled to GS signal), capacitors (first capacitor, second capacitor), and driving transistors. This integration eliminates separate timing logic circuits while maintaining independent functionality of both ultrasonic echo acquisition and light emitting operations through shared control signals (EM for echo acquisition control, GS for light emitting control).

The pixel circuit is designed with multi-functionality to serve both ultrasonic echo acquisition and light emitting purposes. The same circuit nodes, switches, and capacitors are utilized for dual functions: the first switch and first capacitor handle echo acquisition timing controlled by EM signal, while the second switch and second capacitor manage light emitting timing controlled by GS signal. This universal circuit design reduces overall circuit complexity and thickness without sacrificing independent operational capability.

The patent combines timing logic control into a unified circuit architecture where both ultrasonic echo acquisition and light emitting share common timing control mechanisms. The first switch controls the first capacitor for echo acquisition timing, while the second switch controls the second capacitor for light emitting timing, both integrated within the same pixel circuit. This merging eliminates redundant separate timing logic circuits and their associated power consumption while maintaining dedicated control paths through switch-capacitor configurations.

The circuit employs universal control elements that serve multiple functions: the same pixel circuit structure handles both echo acquisition and light emitting operations with different control signals (EM and GS respectively). The driving transistor and associated switches and capacitors are configured to respond to different control signals for different functions, reducing the need for separate dedicated timing logic and thereby reducing overall power consumption while maintaining reliable dedicated control for each function.

The patent implements threshold voltage compensation through preliminary action by configuring the first switch coupled to the EM signal terminal and the second switch coupled to the GS signal terminal. These switches are positioned to enable compensation operations before the main driving functions execute. The first capacitor and second capacitor are charged during specific timing phases to compensate for threshold voltage drops in the driving transistor, ensuring accurate driving signals are generated despite transistor threshold variations.

The circuit incorporates feedback mechanisms where the state of the driving transistor's threshold voltage is compensated through the switch-capacitor configuration. The first and second switches are controlled by EM and GS signals respectively to create feedback paths that adjust for threshold voltage effects. This feedback ensures that the driving signals maintain accuracy by compensating for transistor parameter variations without requiring complex external compensation circuits.