Integrated DRAM with Low-Voltage Swing I/O for Mobile SiP

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Solution Overview

Problem

Conventional memory technologies are not optimized for mobile devices due to constraints on cost, size, and power, making them unsuitable for high-performance applications in mobile spaces.

Innovation Solution

Implementing dynamic random access memory (DRAM) with low-voltage swing input/output (I/O) on a system-in-package (SiP) die carrier, where a DRAM die and application processor (AP) die are mounted adjacent to each other with redistribution layers, enabling efficient data transfer and optimized power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional memory technologies are used in mobile devices, then density efficiency is improved, but power consumption and size constraints are worsened

Engineering Contradiction:

Improvememory densityVSAvoidpower consumption

Core Design Contradiction:

Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent combines the memory controller and DRAM array into a single integrated memory device, eliminating the need for separate memory controllers and reducing overall system power consumption while maintaining high density

Inventive Principle:

Principle #5Merging (Combining)

2Quantity of substance

If conventional memory technologies are used in mobile devices, then density efficiency is improved, but device size is worsened

Engineering Contradiction:

Improvememory densityVSAvoiddevice size

Core Design Contradiction:

Quantity of substanceVSVolume of moving object

Solution Approach 1:

The patent integrates the memory controller and DRAM array into a single monolithic structure, reducing the total volume required for memory functionality in mobile devices

Inventive Principle:

Principle #5Merging (Combining)

3Productivity

If high bandwidth memory interfaces are used, then data transfer speed is improved, but parasitic capacitance and dynamic power are worsened

Engineering Contradiction:

Improvedata transfer bandwidthVSAvoidparasitic capacitance

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the voltage swing parameter from conventional high-voltage interfaces to low-voltage swing interfaces, reducing parasitic capacitance effects and dynamic power consumption while maintaining high bandwidth through increased data width and optimized timing

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10607977B2Integrated DRAM with low-voltage swing I/O

Publication Date: 2020.03.31 GOOGLE LLC

AI summary

This document describes apparatuses and techniques for integrated DRAM with low-voltage swing I/O. In some aspects, a dynamic random access memory (DRAM) die and application processor (AP) die are mounted to a system-in-package (SiP) die carrier that includes one or more redistribution layers. The DRAM die and AP die are located adjacent to each other on the die-carrier such that respective memory inputs/outputs of each die are proximate the other inputs/outputs.