Integrated DRAM-NVM Memory Device for High-Speed Storage
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Solution Overview
Problem
Current memory systems face performance issues due to the separation of volatile DRAM and nonvolatile NAND flash memory, leading to slow data transfer and increased system cost and footprint, as well as limitations in both density and operation speed.
Innovation Solution
A memory device integrating on-chip dynamic random-access memory (DRAM) and nonvolatile memory (NVM) capabilities, allowing for dual operation modes that enable simultaneous storage and data transfer between DRAM and NAND cells on a single chip, optimizing memory performance and reducing the need for separate chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND flash memory is used for main storage, then storage density is improved, but read and write operation speed deteriorates
Solution Approach 1:
The patent combines DRAM and NAND flash memory into a single integrated memory device. The DRAM portion provides fast read and write operations, while the NAND flash portion provides high storage density. The controller manages data transfer between the two memory types, allowing the system to achieve both high speed and high density simultaneously rather than having to choose one or the other.
2Speed
If DRAM is used for working memory, then operation speed is improved, but storage density deteriorates
Solution Approach 1:
The integrated memory device merges DRAM and NAND flash memory on a single chip. The DRAM portion handles high-speed working memory operations, while the NAND flash portion provides additional storage capacity. This eliminates the need for separate DRAM and NAND chips, achieving both high speed and high density in one device.
Solution Approach 2:
The controller in the integrated memory device manages multiple memory types (DRAM and NAND flash) with a single interface. It can dynamically allocate memory space and manage data transfer between the two memory types, allowing the device to function as both high-speed working memory and high-capacity storage memory depending on the operational requirements.
3Ease of manufacture
If separate chips are used for DRAM and NAND memory, then manufacturing process simplicity is improved, but system cost and footprint increase
Solution Approach 1:
The patent integrates DRAM and NAND flash memory onto a single chip, reducing the number of components from two separate chips to one. This decreases the overall footprint and eliminates the need for multiple chip mounting operations. The manufacturing process uses standard semiconductor fabrication techniques to create both memory types on the same substrate, maintaining ease of manufacture while reducing system complexity.
Data Source
AI summary
A memory device is able to store data using both on-chip dynamic random-access memory (“DRAM”) and nonvolatile memory (“NVM”). The memory device, in one aspect, includes NVM cells, word lines (“WLs”), a cell channel, and a DRAM mode select. The NVM cells are capable of retaining information persistently and the WLs are configured to select one of the NVM cells to be accessed. The cell channel, in one embodiment, is configured to interconnect the NVM cells to form a NVM string. The DRAM mode select can temporarily store data in the cell channel when the DRAM mode select is active.