Integrated Electrode Structure for Thin Film Transistor Mask Reduction
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Solution Overview
Problem
The manufacturing of OLED displays is hindered by the large number of layers and masks required for thin film transistors, leading to increased size, reduced productivity, and higher costs.
Innovation Solution
A display device structure where the first and second gate electrodes, source electrodes, and drain electrodes comprise the same layer and material, with a passivation layer directly contacting the semiconductor layers between these electrodes, and a gate insulating layer only on the channel region, reducing the number of masks needed in the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a large number of layers and masks are used to manufacture thin film transistors, then the transistor structure can be completed, but the size of the thin film transistor increases and productivity decreases
Solution Approach 1:
The gate electrode, source electrode, and drain electrode are formed as a single integrated layer structure rather than separate layers, reducing the total number of manufacturing steps and masks while completing the transistor structure
Solution Approach 2:
The single electrode layer serves multiple functions by forming the gate electrode, source electrode, and drain electrode simultaneously, eliminating the need for separate manufacturing processes for each electrode
2Ease of manufacture
If a large number of masks are used to manufacture thin film transistors, then the transistor structure can be completed, but productivity of the OLED display is reduced
Solution Approach 1:
Multiple electrode functions (gate, source, drain) are combined into a single manufacturing step using one mask pattern, significantly reducing the total number of masks required and thereby increasing manufacturing productivity
3Reliability
If the passivation layer is in direct contact with the semiconductor layer between electrodes, then contact area is enhanced, but the gate insulating layer configuration becomes more complex
Solution Approach 1:
The gate insulating layer is selectively positioned only in the channel region between the source and drain electrodes, providing local insulation where needed while allowing direct contact between the passivation layer and semiconductor layer in other regions to enhance contact area
Data Source
AI summary
A display device includes a gate insulating layer disposed on a channel region of a semiconductor layer. A gate electrode is disposed on the gate insulating layer over the channel region of the semiconductor layer. A source electrode is disposed in direct contact with the source region of the semiconductor layer and a drain electrode is disposed in direct contact with a drain region of the semiconductor layer. A passivation layer is disposed on the gate electrode, the source electrode, and the drain electrode. The passivation layer is in direct contact with semiconductor layer in a region between the source electrode and the gate electrode, and is in direct contact with the semiconductor layer in a region between the gate electrode and the drain electrode. The first gate electrode, the first source electrode, and the first drain electrode comprise a same layer and a same material.