Integrated ESD Protection for High-Voltage Semiconductor Devices

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Solution Overview

Problem

High-voltage semiconductor devices are prone to electrostatic discharge (ESD) damage, which poses a challenge in ensuring reliability and lifespan, especially in applications like flat-panel displays and power supplies, where existing ESD protection technologies are inadequate for smaller dimensions and increased functionality.

Innovation Solution

A semiconductor device design integrating a high-voltage semiconductor element and an ESD protection element within a single active region, utilizing a doped region to separate and protect the components, allowing for reduced size while maintaining effective ESD protection by sharing a drain region and body contact region, and using conductive features to electrically connect the elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate ESD protection structures are used for each high-voltage semiconductor element, then ESD protection reliability is improved, but device area increases

Engineering Contradiction:
ImproveESD protection reliabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple ESD protection elements into a shared structure where a single ESD protection element serves multiple high-voltage semiconductor elements. The ESD protection element includes a drain region, body contact region, and source region that are shared among multiple HV elements, eliminating the need for separate protection structures for each element while maintaining protection effectiveness.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ESD protection element is designed with multi-functionality to serve multiple purposes: it protects multiple different types of high-voltage semiconductor elements (such as LDMOS transistors, BJTs, or IGBTs) simultaneously, and its structure can be configured to protect against ESD events from different pins. This universal design reduces the total number of protection elements needed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If device dimensions are reduced for smaller consumer products, then product size is improved, but ESD protection capability deteriorates

Engineering Contradiction:
Improvedevice sizeVSAvoidESD protection capability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

By combining multiple ESD protection functions into a single shared structure, the patent achieves superior ESD protection capability in a compact footprint. The shared drain region, body contact region, and source region allow one ESD protection element to protect multiple HV elements, effectively providing enhanced protection while reducing the total area required compared to having separate protection elements for each HV element.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If multiple separate ESD protection elements are implemented, then comprehensive ESD coverage is improved, but manufacturing complexity increases

Engineering Contradiction:
ImproveESD coverageVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple ESD protection elements into a single integrated structure that can be formed using standard semiconductor fabrication processes. The shared regions (drain, body contact, source) are created in a unified manner rather than as separate structures, simplifying the manufacturing process while maintaining comprehensive ESD coverage across multiple high-voltage elements.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9209169B1Semiconductor device
Publication Date: 2015.12.08 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
  • US9209169B1 patent drawing
  • US9209169B1 patent drawing
  • US9209169B1 patent drawing

AI summary

A semiconductor device includes: a semiconductor layer having an active region defined thereover, wherein the active region comprises a first sub-region and a second sub-region; a first doped region disposed in a portion of the semiconductor layer, extending across the first sub-region and the second sub-region; a high-voltage (HV) semiconductor element disposed over the semiconductor layer in the first sub-region, wherein the HV semiconductor element comprises a portion of the first doped region formed in the semiconductor layer in the first-sub region of the active region; and an electrostatic discharge (ESD) protection element disposed over the semiconductor layer in the second sub-region, wherein the ESD protection element comprises the other portion of the doped region formed in the semiconductor layer in the second sub-region of the active region.