Integrated Fault Injection Emulators for Countermeasure Calibration
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Solution Overview
Problem
Current methods for testing integrated circuit countermeasures against fault injection attacks are inefficient, costly, and time-consuming, particularly in replicating sophisticated attacks, and lack effective means to calibrate and evaluate the sensitivity of countermeasures.
Innovation Solution
An integrated circuit with functional elements, countermeasures, and attack emulators that emulate fault injection attacks to test and calibrate the countermeasures, allowing for automated evaluation and configuration of sensitivity settings without external means.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external brute force testing methods (laser or EM radiation) are used to test countermeasures, then the testing can be performed with existing external equipment, but the testing becomes complex, costly and time consuming with limited usefulness
Solution Approach 1:
The patent creates internal attack emulators that copy the effects of external fault injection attacks (laser, EM radiation) without requiring the actual external equipment. The emulators generate identical electrical disturbances and signal anomalies that would be produced by real attacks, enabling comprehensive testing using only internal circuitry.
Solution Approach 2:
The patent introduces attack emulator circuits as intermediary components that mediate between the countermeasure circuits and the need for external attack sources. These emulators translate the concept of external physical attacks into internal electrical signals, eliminating the need for complex external testing infrastructure.
2Reliability
If countermeasure sensitivity is increased to detect more attacks, then the detection capability improves, but false alarms increase and chip functionality is disrupted
Solution Approach 1:
The patent employs attack emulators that can precisely control and vary attack parameters (strength, duration, location, type) to systematically calibrate countermeasure sensitivity thresholds. By testing with controlled parameter variations, optimal settings are found that maximize detection while minimizing false alarms.
Solution Approach 2:
The patent implements a feedback mechanism where attack emulators apply controlled disturbances and monitor countermeasure responses. This feedback loop enables iterative adjustment of countermeasure sensitivity parameters to achieve optimal detection performance without excessive false alarms.
3Measurement precision
If sophisticated fault injection attacks are replicated for testing, then the testing accuracy improves, but the process becomes complex, costly and time consuming
Solution Approach 1:
The patent integrates attack emulator circuits directly into the chip during manufacturing, preparing the testing capability in advance. This preliminary action eliminates the need for time-consuming external attack replication during actual testing, as all attack types are already embedded and ready for immediate activation.
Solution Approach 2:
The patent merges the attack generation functionality with the chip's internal circuitry by integrating attack emulator elements directly onto the chip. This consolidation combines the previously separate functions of external attack equipment and chip testing into a single integrated system, dramatically reducing testing time and complexity.
Data Source
AI summary
An integrated circuit formed with interconnected electronic elements includes at least:i) functional elements which perform IC operations;ii) at least one countermeasure (CM) for detecting fault injection attacks upon the IC and outputting an alert signal when a FI attack is detected; andiii) at least one attack emulator which emulates FI attacks on the IC by applying stimuli to the plurality of functional elements in accordance with at least one control signal.The IC may include other elements such as power supply elements, oscillators, interface elements and so forth.