Integrated Gate Contact Structure for 3D Semiconductor Reliability

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Solution Overview

Problem

The increasing aspect ratio and reduced contact-poly-pitch in 3D-stacked semiconductor devices lead to challenges in yield improvement due to short-circuit risks and capacitance increases between gate contact structures and other circuit elements.

Innovation Solution

The semiconductor device incorporates a gate contact structure that is a portion of the gate structure itself, eliminating the need for a separate connection surface or interface, and featuring a protrusion or pillar on the top surface of the gate structure to function as a gate contact.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate gate contact structure is formed on the gate structure, then the gate contact can be properly connected to the gate electrode, but misalignment and short-circuit risks increase due to the additional interface and boundary

Engineering Contradiction:
Improveshort-circuit riskVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate contact structure is merged with the gate electrode by forming the gate contact as a protrusion directly from the gate electrode material itself, eliminating the separate interface and boundary between gate contact and gate electrode. This integration removes the misalignment risk and short-circuit potential that would exist at their interface.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If the gate contact structure is formed as a separate entity on the gate structure, then proper electrical connection can be established, but capacitance between the gate contact and other circuit elements increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By merging the gate contact structure with the gate electrode into a single continuous conductive element, the patent eliminates the additional parasitic capacitance that would arise from the separate gate contact structure and its interfaces with other circuit elements.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If a traditional separate gate contact structure is used, then manufacturing processes can follow conventional steps, but the manufacturing process becomes more complex and yield decreases

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidyield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The gate contact structure is formed as an integral part of the gate electrode through a single patterning and etching process, eliminating the need for separate gate contact formation steps. This simplification reduces process complexity and improves manufacturing yield by reducing the number of steps and potential failure points.

Inventive Principle:
Principle #5Merging (Combining)

4Area of stationary object

If the gate structure height is reduced to improve device density, then area efficiency increases, but the aspect ratio increases making fabrication more challenging

Engineering Contradiction:
Improvedevice areaVSAvoidaspect ratio
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The gate contact is formed as a protrusion extending upward from the gate electrode top surface, utilizing the vertical dimension to provide contact access. This allows the gate structure to maintain a reduced overall height for improved device density while the protrusion provides the necessary contact point without increasing the lateral footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12211837B1Semiconductor device including gate contact structure formed from gate structure
Publication Date: 2025.01.28 SAMSUNG ELECTRONICS CO LTD
  • US12211837B1 patent drawing
  • US12211837B1 patent drawing
  • US12211837B1 patent drawing

AI summary

Provided is a semiconductor device which may include: a channel structure; a gate structure on the channel structure; and a gate contact structure on the gate structure, the gate contact structure configured to receive a gate input signal, wherein the gate contact structure is a portion of the gate structure itself, and no connection surface, interface or boundary is formed between the gate contact structure and the gate structure.