Integrated Gate Driver for AMOLED Backplane

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Solution Overview

Problem

Traditional AMOLED display manufacturing involves separate production of the display panel backplane and gate drivers, leading to increased costs and complexity due to the need for different manufacturing techniques and assembly processes.

Innovation Solution

A gate driver is integrated into the backplane of the AMOLED display, utilizing clock signal sources with alternating active and inactive portions, a daisy chain of circuits for producing gate signals, and a start token signal to enable simultaneous manufacturing of the gate driver and display, allowing for the use of the same manufacturing techniques for both.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If gate driver and display panel backplane are manufactured separately, then different manufacturing techniques can be applied to each, but manufacturing complexity and assembly requirements increase

Engineering Contradiction:
Improvemanufacturing flexibilityVSAvoidassembly complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The gate driver circuit is integrated directly into the backplane of the AMOLED display, combining two previously separate components into a single unified structure. This integration allows both the display panel and gate driver to be manufactured simultaneously using the same thin-film transistor fabrication techniques, eliminating the need for separate manufacturing processes and reducing assembly complexity while maintaining manufacturing flexibility

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If gate driver is integrated into the backplane, then manufacturing cost decreases and assembly is simplified, but timing precision for gate signals must be maintained

Engineering Contradiction:
Improvecomponent countVSAvoidsignal timing precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The integrated gate driver uses alternating clock signals (CLK1 and CLK2) with alternating active and inactive portions to drive the gate signals. This periodic action ensures that each gate signal is generated at the correct time relative to the clock cycles, maintaining precise timing control despite the integration. The alternating nature of the clock signals allows for synchronized operation of multiple circuits within the integrated structure

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent introduces a start token signal as an intermediary control mechanism that initiates the generation of gate signals in the daisy-chain connected circuits. This token signal propagates through the integrated circuits, ensuring that each circuit generates its gate signal at the precise moment when needed, thereby maintaining timing precision across the entire integrated gate driver system

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If separate manufacturing techniques are used for gate driver and display, then optimal performance for each can be achieved, but production time and cost increase

Engineering Contradiction:
Improvecomponent performanceVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The integrated gate driver and display backplane are both manufactured using the same thin-film transistor fabrication techniques, making the manufacturing process universal. This multi-functional approach allows a single manufacturing line to produce both the display panel and gate driver simultaneously, improving productivity and reducing costs while maintaining the performance requirements of both components through optimized circuit design

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10176752B2Integrated gate driver
Publication Date: 2019.01.08 IGNIS INNOVATION
  • US10176752B2 patent drawing
  • US10176752B2 patent drawing
  • US10176752B2 patent drawing

AI summary

A gate driver suitable for integration with the backplane of an AMOLED display includes first and second clock signal sources producing first and second clock signals each having alternating active and inactive portions configured such that when one of the clock signals is active the other of the clock signals is inactive, and active portions of the first and second clock signals do not overlap. In a daisy chain of circuits for producing gate signals, each of the circuits except the last has an output coupled to the input of the next circuit in the chain. A source of a start token signal is coupled to an input of a first circuit in the daisy chain. Each of the circuits is configured to produce a gate signal one clock cycle after an active portion of one of the clock signals is received.