Integrated High Voltage Diode Substrate Isolation
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Solution Overview
Problem
Existing semiconductor device structures for portable power management require external high voltage diodes, leading to increased costs and performance limitations due to the difficulty in achieving high switching frequencies.
Innovation Solution
Integration of a high voltage diode into a semiconductor device using an asymmetric design with a substrate isolated structure, including an epitaxial layer, deep well implants, shallow trench isolation, and a polysilicon-walled layout, allowing for higher switching frequencies and efficient power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high voltage diode is implemented using a hybrid circuit design with external components, then the diode function is achieved, but the system cost increases and switching frequency performance deteriorates
Solution Approach 1:
The patent combines the high voltage diode structure with the CMOS transistor structure by integrating the p-type well, n-type epitaxial layer, and shallow trench isolation within the same device footprint. This merging eliminates the need for external diode components while achieving the desired power management function, thereby reducing system cost and complexity.
2Reliability
If a high voltage diode is implemented using a hybrid circuit design with external components, then the diode function is achieved, but the switching frequency performance deteriorates
Solution Approach 1:
The integrated structure allows the diode and transistor to operate as a unified circuit element, enabling much higher switching frequencies (>2 MHz) compared to external component implementations. The combined structure reduces parasitic inductance and improves signal integrity, directly enhancing productivity in power conversion applications.
3Productivity
If a substrate isolated high voltage diode is integrated within a unit cell, then switching frequency performance improves, but the device structure complexity increases
Solution Approach 1:
The patent employs asymmetric device design where the p-type well and n-type epitaxial layer are configured with specific geometric asymmetries to optimize high voltage blocking while maintaining compact integration. The shallow trench isolation is positioned asymmetrically to achieve substrate isolation without requiring symmetric complex structures, thus managing device complexity while improving switching frequency performance.
4Reliability
If a shallow trench isolation region is used to separate cathode from anode, then substrate isolation and high voltage performance improve, but the manufacturing process complexity increases
Solution Approach 1:
The shallow trench isolation is formed as part of the preliminary CMOS fabrication steps, specifically during the well formation and oxidation phases. By preparing the isolation structures early in the manufacturing process, the patent achieves substrate isolation and high voltage performance without requiring additional complex manufacturing steps, thus maintaining ease of manufacture.
Data Source
AI summary
An asymmetric semiconductor device (3) that includes an integrated high voltage diode (72), including: a substrate comprising an epitaxial layer (47) and a deep well implant (42) of a first type patterned above the epitaxial layer; a shallow trench isolation (STI) region (46) separating a cathode from an anode; a first well implant (40) of a second type residing below the anode; and a deep implant mask (34) of the second type patterned above the deep well implant and below both the cathode and a portion of the STI region.