Integrated Inductor Resistor Capacitor in DrMOS Package
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power semiconductor packages with driver metal-oxide-silicon transistors (DrMOS) have an external inductor, which increases size and reduces electrical efficiency, and does not optimize dynamic performance and thermal dissipation.
Innovation Solution
Integration of an inductor, capacitor, and resistor within the DrMOS package, along with a lead frame and bonding wires, to create a compact power semiconductor package with improved thermal dissipation and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If an external inductor is used in conventional DrMOS packages, then the inductor can be separately optimized, but the package size increases and electrical efficiency decreases
Solution Approach 1:
The patent combines the inductor, capacitor, and resistor into a single integrated assembly that is disposed within the DrMOS package. This merging of previously separate components eliminates the need for external inductors, thereby reducing package size and improving electrical efficiency by minimizing parasitic inductance in interconnections.
Solution Approach 2:
The inductor assembly is positioned in a three-dimensional space above the FETs and bonding wires, utilizing vertical space rather than horizontal expansion. This dimensional arrangement allows the inductor to be integrated without increasing the package footprint, effectively reducing the overall package volume while maintaining functionality.
2Temperature
If an external inductor is used, then component layout is simplified, but thermal dissipation and dynamic performance are not optimized
Solution Approach 1:
By merging the inductor, capacitor, and resistor into a single integrated assembly positioned above the FETs, the patent creates a compact structure that improves thermal dissipation. The integrated design allows for optimized thermal pathways and reduced thermal resistance, while the increased device complexity is offset by the performance benefits in thermal management and dynamic response.
Data Source
AI summary
A power semiconductor package comprises a lead frame, a low side field-effect transistor (FET), a high side FET, a capacitor, a resistor, an inductor assembly, a first plurality of bonding wires, and a molding encapsulation. In one example, an entirety of the inductor assembly is disposed at a position higher than an entirety of the low side FET, higher than an entirety of the high side FET, and higher than an entirety of the first plurality of bonding wires. In another example, a bottom surface of the low side FET and a bottom surface of the inductor assembly are co-planar.