Integrated Inductor Switching Regulator Unit Cell
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Solution Overview
Problem
The challenge in designing switching regulators for System-on-Chip (SoC) devices is to achieve high inductance-to-resistance values in a small form factor, which is essential for reducing parasitic inductance effects that cause performance limitations due to high frequencies and currents.
Innovation Solution
A scalable switching regulator architecture with an integrated inductor is developed, where the area and current drive capability of switches are matched with the inductor, constructed as a unit cell, and formed using a multi-layer substrate with ferrite material interspersed copper traces to enhance inductance and reduce resistance, allowing for multi-phase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional separate inductor and switch design is used, then ease of manufacture is improved, but device area increases and parasitic inductance effects worsen
Solution Approach 1:
The patent combines the inductor and switch into a single integrated unit cell structure where the inductor is formed directly above the switch in a multi-layer configuration. This merging reduces the overall device area by eliminating separate inductor and switch components while maintaining manufacturability through standardized integration processes.
Solution Approach 2:
The patent transitions from a planar two-dimensional layout to a three-dimensional multi-layer structure by stacking the inductor above the switch vertically. This dimensional change allows both components to occupy the same footprint area, significantly reducing the device area while keeping the manufacturing process compatible with existing multi-layer fabrication techniques.
2Area of stationary object
If inductor area is reduced to fit small form factor, then device area is improved, but inductance value decreases
Solution Approach 1:
The patent uses vertical stacking in a multi-layer configuration to increase the effective inductance within a reduced footprint. By forming the inductor above the switch in three dimensions, the design achieves higher inductance values without proportionally increasing the device area, as the vertical space is utilized more efficiently.
Solution Approach 2:
The patent employs a composite structure combining multiple conductive layers, magnetic materials, and insulation layers in a multi-layer stack. This composite approach enhances the inductance density by utilizing magnetic core materials and optimized trace geometries across multiple layers, achieving higher inductance values in a compact form factor.
3Area of stationary object
If inductor area is reduced to fit small form factor, then device area is improved, but resistance increases
Solution Approach 1:
The patent reduces resistance by distributing the current path across multiple conductive layers in a vertical stack. The multi-layer configuration provides multiple parallel current paths and shorter trace lengths, reducing ohmic losses while maintaining a compact footprint.
Solution Approach 2:
The patent segments the inductor into multiple turns and layers, with each layer contributing to the overall inductance while providing distributed current paths. This segmentation reduces the current density in any single trace, lowering resistive losses and improving efficiency in the compact design.
4Area of stationary object
If switches and inductor are integrated in same area, then device area is improved, but device complexity increases
Solution Approach 1:
The patent divides the integrated design into modular unit cells, each containing a switch and its associated inductor in a standardized multi-layer configuration. This segmentation into repeatable units simplifies the overall design process and fabrication, as each unit cell can be manufactured independently and then combined to form the complete device.
Solution Approach 2:
The patent creates a universal unit cell design that can be replicated and scaled for different current requirements and power levels. The standardized multi-layer switch-inductor structure serves multiple functions (switching, energy storage, current routing) within a single integrated module, reducing design complexity while achieving area efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively minimizes parasitic inductance effects, enabling efficient power regulation and improved performance in mobile devices by optimizing the inductor design within the same area as the switches, enhancing current drive capability and multiphase operation.
Implementation Method 1
a multi-layer substrate with ferrite material interspersed copper traces to enhance inductance and reduce resistance
Data Source
AI summary
A scalable switching regulator architecture has an integrated inductor. In some embodiments an area and current drive capability of switches of the switching regulator is matched with an inductor built within an area above the switches. In some embodiments the combined switches and inductor are constructed as a unit cell and can be combined to form larger elements as required for higher current drive capability and multiphase operation.