Integrated I/O Latency Measurement for Real-Time Tuning

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional data processing systems lack features for accurately and efficiently generating input/output (I/O) latency metrics, which are crucial for optimizing system performance, and it is difficult to develop software that can efficiently generate such metrics.

Innovation Solution

A data processing system with an integrated I/O manager that includes I/O measurement modules to generate I/O latency metrics, such as average, minimum, and maximum response times, without adding extensive circuitry, enabling real-time measurement and optimization of system performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional data processing systems are used without dedicated I/O measurement features, then device complexity is reduced, but measurement precision of I/O latency metrics deteriorates

Engineering Contradiction:
ImproveI/O latency metrics accuracyVSAvoidcircuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple measurement functions (read latency, write latency, mixed latency, core cycle counting) into a single integrated I/O measurement module within the I/O manager. This consolidation achieves high measurement precision through dedicated hardware counters and timestamps while avoiding the complexity of multiple separate measurement devices, as the module leverages existing system resources like the performance monitoring unit (PMU) and timestamp counters.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If software-based I/O metric generation is implemented in conventional systems, then ease of manufacture is improved, but productivity of metric generation deteriorates

Engineering Contradiction:
Improvemetric generation speedVSAvoidsoftware development complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent replaces software-based I/O metric generation with a hardware-based measurement module that uses dedicated counters, timestamps, and event detection circuitry. This substitution dramatically improves productivity by capturing I/O latency metrics directly in hardware at the speed of I/O operations, eliminating the overhead and complexity of software polling and timing mechanisms. The hardware module automatically generates precise metrics without requiring complex software development or intervention.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Loss of time

If real-time I/O latency measurement is implemented, then loss of time for performance optimization is reduced, but device complexity increases

Engineering Contradiction:
Improveperformance tuning timeVSAvoidmeasurement module complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The I/O measurement module operates autonomously, automatically capturing timestamps, counting core cycles, and calculating latency metrics without external intervention. The module self-manages the measurement process by detecting I/O events, recording timing data in dedicated registers, and providing ready-to-use metrics to the system, thereby eliminating time loss for performance tuning while keeping the added complexity minimal through automated operation.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The measurement module pre-configures timestamp counters and core cycle counters before I/O operations occur, and continuously monitors system state in preparation for measurement. This preliminary setup ensures that when I/O events occur, all necessary timing and performance data are already captured and ready for immediate analysis, reducing the time needed for post-processing and performance optimization while maintaining a streamlined module design.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3754481B1Technology for generating input/output performance metrics
Publication Date: 2025.08.27 INTEL CORP
  • EP3754481B1 patent drawingFigure 1
  • EP3754481B1 patent drawingFigure 2
  • EP3754481B1 patent drawingFigure 3A

AI summary

An integrated circuit includes technology for generating input/output (I/O) latency metrics. The integrated circuit includes a real-time clock (RTC), a read measurement register, and a read latency measurement module. The read latency measurement module includes control logic to perform operations comprising (a) in response to receipt of read responses that complete read requests associated with an I/O device, automatically calculating read latencies for the completed read requests, based at least in part on time measurements from the RTC for initiation and completion of the read requests; (b) automatically calculating an average read latency for the completed read requests, based at least in part on the calculated read latencies for the completed read requests; and (c) automatically updating the read measurement register to record the average read latency for the completed read requests. Other embodiments are described and claimed.