Integrated Laminates for Low-Profile Electronic Circuits
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Solution Overview
Problem
Conventional electronic circuits using discrete capacitors and magnetic/inductive components are bulky, high in profile, and generate parasitic inductance and noise, making them unsuitable for low-profile devices and high-frequency applications, and are difficult to optimize due to separate testing and tolerance variations.
Innovation Solution
Integrated laminate structures combining semiconductor chips, capacitive, inductive, and electromagnetic shielding layers are fabricated using modular laminates that can be vertically laminated or integrated side-by-side, reducing size and height while providing low voltage ripple and noise shielding, through a process that includes copper coil conductor layers, insulation, and magnetic core sheets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If discrete capacitors and magnetic/inductive components are used, then circuit functionality is achieved, but device size and profile height increase
Solution Approach 1:
The patent combines discrete capacitors, magnetic/inductive components, and semiconductor devices into a single integrated laminate structure. Multiple functional layers are stacked and bonded together to form one compact device, eliminating the need for separate discrete components and reducing overall device volume while maintaining all necessary circuit functionalities.
Solution Approach 2:
The invention transitions from planar arrangement of discrete components on a PCB to a three-dimensional stacked laminate structure. By utilizing the vertical dimension through layer stacking, the patent achieves high integration density while reducing the horizontal footprint and overall device profile height.
2Object-generated harmful factors
If wire-wound magnetic components are used, then inductance function is achieved, but acoustic noise is generated
Solution Approach 1:
The patent replaces traditional wire-wound mechanical inductors with planar spiral inductor traces fabricated on PCB layers. This substitution eliminates the mechanical wire winding structure that causes vibration and acoustic noise, while maintaining the inductance function through electromagnetic field generation in the planar trace configuration.
3Object-affected harmful factors
If discrete components are interconnected on PCB, then circuit connectivity is achieved, but parasitic inductance and capacitance increase
Solution Approach 1:
The patent merges the interconnection function into the laminate structure itself by fabricating conductive traces and vias directly within the stacked layers. This integration eliminates separate external interconnection paths on PCB, thereby reducing parasitic inductance and capacitance while maintaining all necessary electrical connections between functional components.
4Manufacturing precision
If discrete capacitors and magnetic components are tested separately, then individual component testing is achieved, but circuit optimization is difficult
Solution Approach 1:
The patent combines all functional components into a single integrated laminate unit that can be tested as one complete assembly. This integration allows for system-level testing and optimization of the entire circuit rather than requiring separate testing of individual discrete components, thereby achieving better overall circuit performance while maintaining manufacturing precision through controlled fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables compact, low-noise electronic circuits with improved frequency response and reduced acoustic noise, allowing for optimized performance in portable and wearable devices by integrating all necessary components into a single, efficient module.
Implementation Method 1
copper coil conductor layers
Implementation Method 2
magnetic core sheets
Implementation Method 3
capacitive layers
Implementation Method 4
electromagnetic shielding layers
Data Source
AI summary
Semiconductor chip laminates and inductive, capacitive, and electromagnetic shielding laminate structures that can be integrated together to form electronic circuits for use in systems and devices such as smartphones, tablet computers, notebook computers, wearable electronic devices, portable medical devices, servers, networking equipment, industrial equipment, etc. Fabrications of such integrated laminate structures can be modularized into four (4) types of laminates, namely, inductive laminates, capacitive laminates, electromagnetic shielding laminates, and semiconductor chip laminates, which can be vertically laminated together and/or integrated side-by-side with high density to produce the desired electronic circuits, systems, and devices.