Integrated LC Clock Generator With Controlled Q for Low Jitter
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Solution Overview
Problem
Existing clock generators, such as crystal oscillators, cannot be integrated with microprocessors as a single IC, leading to increased power consumption, space requirements, and manufacturing costs, and are not sufficiently accurate over PVT variations, frequency drift, and noise interference.
Innovation Solution
A monolithically integrated reference signal generator with a free-running oscillator that uses reactance modules with switchable reactance unit cells and a frequency controller to maintain accurate frequency control over temperature, voltage, and fabrication process variations, providing a controlled Q factor and low jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If crystal oscillators are used for accurate clock generation, then frequency accuracy is improved, but integration with microprocessors is prevented
Solution Approach 1:
The patent replaces mechanical crystal oscillators with an electronic oscillator circuit implemented entirely in CMOS technology. The oscillator uses an LC tank circuit with cross-coupled transistors and feedback paths, eliminating the need for mechanical resonators while achieving comparable frequency accuracy through electronic means.
Solution Approach 2:
The oscillator circuit is designed to be fully integrated with microprocessor logic circuits on the same CMOS chip. The same semiconductor fabrication process that creates logic transistors is used to create the oscillator components, allowing the clock generator to serve multiple functions including frequency generation, buffering, and distribution within a single integrated device.
2Measurement precision
If separate clock IC is used, then frequency accuracy is maintained, but power consumption increases
Solution Approach 1:
The patent merges the clock generator with the microprocessor into a single integrated circuit. The oscillator, buffer stages, and frequency control logic are all implemented using the same CMOS transistors and interconnect structures, eliminating the need for separate clock IC packaging, bonding wires, and external power distribution that would increase overall power consumption.
3Stability of the object's composition
If separate clock IC is used, then frequency stability is maintained, but area requirements increase
Solution Approach 1:
The oscillator circuit is nested within the microprocessor chip structure, utilizing the same substrate, interconnect layers, and transistor fabrication. The LC tank inductors are implemented using on-chip spiral inductors formed from metal interconnect layers, and capacitors are formed using MOS capacitor structures, allowing the entire clock generation system to occupy minimal area within the processor die.
4Device complexity
If simple oscillators are used for integration, then device complexity is reduced, but frequency accuracy deteriorates
Solution Approach 1:
The oscillator incorporates feedback paths where the output of the cross-coupled transistor pair is fed back through the LC tank circuit to the input. This positive feedback mechanism sustains oscillation at the resonant frequency of the tank circuit. Additionally, the buffer stages provide isolation feedback to prevent loading effects from disturbing the oscillation frequency, maintaining accuracy while using simple CMOS components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a highly accurate, low-jitter clock signal that is integrated with other circuitry, reducing power consumption and space requirements while maintaining stability across various environmental and fabrication-induced variations.
Implementation Method 1
a reference resonator to generate a first reference signal having a resonant frequency
Implementation Method 2
A plurality of reactance modules couplable to the reference resonator, each reactance module of the plurality of reactance modules comprising one or more reactance unit cells
Data Source
AI summary
Exemplary embodiments of the invention provide a reference signal generator having a controlled quality (“Q”) factor. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, which generates a first reference signal having a resonant frequency, and a plurality of reactance modules couplable to the reference resonator. Each reactance module comprises one or more reactance unit cells, and each reactance unit cell comprises a reactance element coupled in series to a switching element. In exemplary embodiments, the reactance element is a capacitor having a predetermined unit of capacitance, and the switching element is a transistor having a predetermined resistance when in an off state. The ratio of capacitance to resistance is substantially constant for all reactance modules of the plurality of reactance modules.