Integrated N-Type LED Structure for High-Resolution Displays

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Solution Overview

Problem

The challenge is to miniaturize light emitting elements for high-performance display devices while improving light emission efficiency and reducing process risks in their manufacturing.

Innovation Solution

A display device with light emitting elements comprising N-type and P-type semiconductor layers and an active layer, where the N-type semiconductor layers are integral and form a plane surface, and a thermal cleaning process is used to prepare the substrate, optimizing temperatures between 600°C to 800°C with simultaneous H2 and NH3 supply to enhance manufacturing efficiency and emission efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the size of light emitting element is miniaturized for high resolution, then the resolution is improved, but the manufacturing process risk is increased

Engineering Contradiction:
ImproveresolutionVSAvoidprocess risk
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent merges multiple light emitting elements (first and second light emitting elements with different colors) onto a single N-type semiconductor layer, forming an integral structure. This integration reduces the number of separate manufacturing processes and associated risks, while enabling high-resolution displays through miniaturized element structures.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies thermal cleaning process at 600-800°C with H2 and NH3 supply before forming the active layer on the N-type semiconductor layer. This preliminary cleaning action removes contaminants and prepares the surface in advance, reducing manufacturing risks for subsequent miniaturized element formation.

Inventive Principle:
Principle #10Preliminary action

2Illumination intensity

If the light emission efficiency is improved, then the display performance is enhanced, but the process complexity is increased

Engineering Contradiction:
Improvelight emission efficiencyVSAvoidprocess complexity
Core Design Contradiction:
Illumination intensityVSDevice complexity

Solution Approach 1:

The patent optimizes the thermal cleaning process parameters by controlling temperature within 600-800°C range and supplying both H2 and NH3 simultaneously. These parameter changes improve light emission efficiency by ensuring proper semiconductor layer formation while maintaining manageable process complexity through defined parameter ranges.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite semiconductor structures including N-type semiconductor layer, active layer with barrier layer and well layer, and P-type semiconductor layer. This composite material structure enhances light emission efficiency through optimized carrier confinement and recombination, while the systematic layering approach keeps the manufacturing process organized and manageable.

Inventive Principle:
Principle #40Composite materials

3Productivity

If the N-type semiconductor layer is made integral for multiple elements, then the manufacturing efficiency is improved, but the structural complexity is increased

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidstructural complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple light emitting elements (first and second elements emitting different colors) on a single integral N-type semiconductor layer. This merging approach improves manufacturing efficiency by reducing the number of separate N-type layers and associated processing steps, while the elements are spatially separated and selectively patterned to manage structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

While the N-type semiconductor layer is integral, the patent segments the upper structures by forming separate active layers and P-type semiconductor layers for each light emitting element through selective masking and patterning. This segmentation allows multiple elements with different optical characteristics to coexist on a shared N-type base, balancing manufacturing efficiency with functional differentiation.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces process risks, improves manufacturing efficiency, and enhances light emission efficiency by ensuring proper formation of semiconductor layers and active layers, leading to improved performance in display devices.

Implementation Method 1

a thermal cleaning process is used to prepare the substrate, optimizing temperatures between 600°C to 800°C with simultaneous H2 and NH3 supply

Methodology Applied
Scientific EffectThermal cleaning: Heating

Data Source

PatentUS20240154064A1Display device and method of manufacturing the same
Publication Date: 2024.05.09 SAMSUNG DISPLAY CO LTD
  • US20240154064A1 patent drawing
  • US20240154064A1 patent drawing
  • US20240154064A1 patent drawing

AI summary

A display device includes: a base layer; and light emitting elements disposed on the base layer, the light emitting elements including an N-type semiconductor layer, a P-type semiconductor layer, and an active layer disposed between the N-type and P-type semiconductor layers. The light emitting elements include a first light emitting element emitting light of a first color and a second light emitting element emitting light of a second color. The N-type semiconductor layer includes a first N-type semiconductor layer of the first light emitting element and a second N-type semiconductor layer of the second light emitting element. The active layer includes a first active layer of the first light emitting element and a second active layer of the second light emitting element. The first and second N-type semiconductor layers are integral with each other, and form a plane surface in an area where the active layer is disposed.