Integrated Memory Capacitor Lattice Support

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Solution Overview

Problem

High-aspect-ratio container-shaped storage nodes in integrated circuitry are structurally weak and prone to toppling, twisting, or breaking, leading to non-uniform performance and potential inoperability of capacitors due to inadequate lattice support.

Innovation Solution

The implementation of an integrated assembly with a middle-level lattice patterned differently than the upper-level lattice provides enhanced support for container-shaped capacitor storage nodes, alleviating structural instability by distributing stress more effectively across the nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If container-shaped storage nodes are formed with higher aspect ratios to achieve desired capacitance while decreasing semiconductor real estate consumption, then capacitance density is improved, but structural stability deteriorates causing toppling, twisting and breaking

Engineering Contradiction:
Improvecapacitance densityVSAvoidstructural stability
Core Design Contradiction:
Quantity of substanceVSStrength

Solution Approach 1:

The lattice structure is divided into multiple discrete support elements distributed around the storage node. These segmented lattice components provide distributed structural support rather than a single continuous support structure, enabling the high-aspect-ratio container to maintain stability while achieving high capacitance density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The lattice structure provides localized support at specific critical points around the storage node circumference. By concentrating support where most needed (at the base and along vertical edges), the lattice enables high aspect ratios without uniformly increasing material throughout the entire structure

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If uniform lattice patterns are used at all levels to support storage nodes, then manufacturing simplicity is maintained, but structural effectiveness deteriorates due to inadequate stress distribution

Engineering Contradiction:
Improvelattice patterning simplicityVSAvoidstructural support effectiveness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The lattice structure employs different patterns at different vertical levels - a first lattice pattern at a lower level and a second lattice pattern at a higher level. This asymmetric design optimizes stress distribution at each level, with the lower lattice providing broad base support and the upper lattice providing targeted edge support, thereby improving structural reliability

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The solution transitions from a single-level lattice pattern to a multi-level lattice structure with different patterns at different heights. This dimensional approach allows optimization of support characteristics at each vertical level, improving overall structural effectiveness while maintaining manufacturability through standard fabrication processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10535661B2Integrated memory and integrated assemblies
Publication Date: 2020.01.14 MICRON TECHNOLOGY INC
  • US10535661B2 patent drawing
  • US10535661B2 patent drawing
  • US10535661B2 patent drawing

AI summary

Some embodiments include an integrated assembly having a capacitor. The capacitor has a storage node configured as an upwardly-opening container shape. The container shape has a first side surface and a second side surface. The first and second side surfaces are along outer edges of the container shape and are in opposing relation to one another. The second side surface has a lower portion vertically overlapped by the first side surface, and has an upper portion which is not vertically overlapped by the first side surface. A middle-level lattice is adjacent to the first side surface and supports the first side surface. A higher-level lattice is adjacent to the second side surface and supports the second side surface. Some embodiments include integrated memory (e.g., DRAM).