Integrated MIM-MOM Capacitor Structure for High Capacitance Density
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Solution Overview
Problem
Existing semiconductor structures face challenges in achieving high capacitance density without significantly increasing manufacturing complexity or cost, particularly in integrating both MIM and MOM capacitors effectively.
Innovation Solution
A semiconductor structure is designed with a combination of MIM and MOM capacitors, where a dielectric layer is interposed between them, enhancing parasitic capacitance and increasing overall capacitance density, allowing for higher operation voltages without additional complexity or cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a combination of MIM and MOM capacitors is integrated to increase capacitance density, then capacitance density is improved, but device complexity increases
Solution Approach 1:
The patent combines MIM and MOM capacitor structures into a single integrated unit, where the MIM capacitor is formed between conductive layers and the MOM capacitor is formed between metal fingers, with both sharing common conductive layers and dielectric materials. This merging approach achieves high capacitance density while managing structural complexity through shared components.
Solution Approach 2:
The patent implements a nested structure where the MIM capacitor is positioned within or adjacent to the MOM capacitor structure, with the dielectric layer interposed between them. The conductive layers of the MIM capacitor are integrated with the metal finger structure of the MOM capacitor, creating a compact nested arrangement that maximizes capacitance within limited space.
2Quantity of substance
If dielectric layer is interposed between MIM and MOM capacitors to enhance parasitic capacitance, then capacitance density is improved, but manufacturing complexity increases
Solution Approach 1:
The dielectric layer is formed as part of the preliminary structure before the final capacitor assembly. The interposed dielectric layer is integrated into the manufacturing sequence, where it is deposited and patterned along with the conductive layers and metal fingers, rather than being added as a separate post-processing step.
Solution Approach 2:
The interposed dielectric layer serves multiple functions: it provides electrical isolation between the MIM and MOM capacitor structures, contributes to the overall capacitance through its dielectric properties, and serves as a structural foundation for the metal finger interconnections. This multi-functionality reduces the need for additional specialized layers.
3Power
If higher operation voltages are supported, then power gain is improved, but noise increases
Solution Approach 1:
The interposed dielectric layer acts as an intermediary between the MIM and MOM capacitor structures, providing electrical isolation that prevents noise coupling between the two capacitor types. This dielectric barrier allows high voltage operation for power gain while maintaining low noise performance by blocking noise propagation pathways.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The combined capacitor structure achieves increased capacitance density, stabilizing power signals and reducing noise, with a capacitance density value of greater than 2 nF/mm² for high voltage devices, while maintaining manufacturing efficiency.
Implementation Method 1
enhancing parasitic capacitance and increasing overall capacitance density
Data Source
AI summary
A semiconductor structure includes a first metal-dielectric-metal layer, a first dielectric layer, a first conductive layer, a second conductive layer, and a second dielectric layer. The first metal-dielectric-metal layer includes a plurality of first fingers, a plurality of second fingers, and a first dielectric material. The first fingers are electrically connected to a first voltage. The second fingers are electrically connected to a second voltage different from the first voltage, and the first fingers and the second fingers are arranged in parallel and staggeredly. The first dielectric material is between the first fingers and the second fingers. The first dielectric layer is over the first metal-dielectric-metal layer. The first conductive layer is over the first dielectric layer. The second conductive layer is over the first conductive layer. The second dielectric layer is between the first conductive layer and the second conductive layer.