Integrated Trench and Planar MOSFET Gate Structure for Yield Stability
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Solution Overview
Problem
The manufacturing process for semiconductor devices with both trench gate-type MOSFETs and planar-type MOSFETs on the same substrate is complex, leading to potential malfunctions and reduced reliability and yield due to differences in device structure and required characteristics.
Innovation Solution
A method involving specific steps such as forming a trench in the semiconductor substrate, embedding a gate electrode within the trench with a gate insulating film, and using distinct gate electrodes and insulating films for each type of MOSFET, along with a cap film and conductive films, to improve the integration and reliability of both types on the same substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If MOSFETs for output circuit and control circuit are formed on the same semiconductor substrate, then mounting cost decreases and device size is reduced, but manufacturing process becomes complicated and reliability deteriorates
Solution Approach 1:
The patent divides the semiconductor substrate into distinct first and second regions, with the first region dedicated to trench gate-type MOSFETs for the output circuit and the second region dedicated to planar-type MOSFETs for the control circuit. This spatial segmentation allows each type of MOSFET to be manufactured using its optimized process while coexisting on the same substrate, thus reducing device size without excessively complicating the manufacturing process.
2Ease of manufacture
If MOSFETs for output circuit and control circuit are formed on the same semiconductor substrate, then mounting cost decreases, but manufacturing process becomes complicated and yield decreases
Solution Approach 1:
By segmenting the substrate into separate regions for different MOSFET types, the patent enables independent optimization of manufacturing processes for each region. This reduces the risk of mutual interference between processes, thereby maintaining higher yield while still achieving cost benefits from integrated mounting.
Solution Approach 2:
The patent applies different structural configurations (trench gate structure in the first region, planar structure in the second region) tailored to the specific requirements of each MOSFET type. This local quality approach ensures that each region maintains its optimal manufacturing characteristics and performance, preventing yield deterioration despite process complexity.
3Adaptability or versatility
If trench gate-type MOSFET and planar-type MOSFET are formed on the same substrate, then device integration is achieved, but reliability deteriorates due to process complexity
Solution Approach 1:
The patent achieves device integration by forming both trench gate-type and planar-type MOSFETs on the same semiconductor substrate, with each type located in its dedicated region. This segmentation strategy maintains reliability by preventing process interference between the two MOSFET types while still realizing the benefits of integrated device architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices and suppresses yield decreases by simplifying the manufacturing process and ensuring proper integration of trench gate-type and planar-type MOSFETs, maintaining performance and reliability.
Implementation Method 1
a gate insulating film formed in the trench to a depth different from that of the gate electrode
Implementation Method 2
by performing anisotropic etching process to the first conductive film
Data Source
AI summary
Reliability of a semiconductor device is improved, and a decrease in yield is suppressed. A hard mask is formed on an upper surface of a semiconductor substrate. A trench is formed in the semiconductor substrate exposed out from the hard mask. A gate insulating film is formed in the trench. A conductive film is formed on the gate insulating film and the hard mask. The conductive film on the hard mask is removed, and a gate electrode is formed in the trench. A cap film is formed on an upper surface of the gate electrode. The hard mask is removed. A gate insulating film is formed on the upper surface of the semiconductor substrate. A conductive film is formed on the gate insulating film and the cap film. The conductive film on the cap film is removed, and a gate electrode is formed on the gate insulating film.