Integrated MOSFET Structure for Reverse Battery Protection
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Solution Overview
Problem
In semiconductor circuits, particularly those used in automotive applications, the on-resistance and circuit area tend to increase with the number of MOSFETs connected in series, making it challenging to achieve on-resistance reduction and miniaturization, especially in battery reverse connection preventing circuits.
Innovation Solution
A semiconductor element with a field effect transistor, including a first electrode, a drift region, and a well region, along with a first and second body diode connected in series, where the forward direction of the first body diode is reverse to the second, and a Zener diode with a lower breakdown voltage is used to protect the element.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple MOSFETs are connected in series to prevent reverse battery connection, then reliability is improved, but on-resistance increases and device area expands
Solution Approach 1:
The patent merges two MOSFETs into a single integrated structure where the second MOSFET is formed within the same semiconductor substrate as the first MOSFET. The source region of the second MOSFET is formed in the drain region of the first MOSFET, and the drain region of the second MOSFET is formed in the source region of the first MOSFET, creating a compact series connection that reduces overall device area while maintaining the protective function.
Solution Approach 2:
The patent implements a nested structure where the second MOSFET is embedded within the structure of the first MOSFET. The well region of the second MOSFET is formed in the drift region of the first MOSFET, and the source/drain regions are interleaved, creating a space-efficient configuration that reduces the total device footprint while maintaining both MOSFETs' protective functionality.
2Reliability
If multiple MOSFETs are connected in series to prevent reverse battery connection, then reliability is improved, but on-resistance increases
Solution Approach 1:
The patent applies local quality by forming high-concentration n-type impurity regions at specific locations to reduce on-resistance. The source region of the first MOSFET and the drain region of the second MOSFET are doped with high-concentration n-type impurities, creating low-resistance contact points that compensate for the series connection resistance while maintaining the protective function.
Solution Approach 2:
The patent changes the impurity concentration parameters to reduce on-resistance. By forming high-concentration n-type impurity regions in the source and drain regions, and optimizing the doping levels in the well and drift regions, the patent reduces the overall on-resistance of the series-connected MOSFET structure while maintaining reliability.
3Reliability
If conventional discrete MOSFETs are used for reverse battery protection, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent merges two separate MOSFET devices into a single integrated semiconductor structure. Both MOSFETs share the same semiconductor substrate, gate structure, and interconnect layers, eliminating the need for separate discrete components and reducing circuit complexity while maintaining the reverse battery protection function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces on-resistance and miniaturizes the semiconductor device while effectively preventing breakdowns due to reverse battery connections and abnormal currents.
Implementation Method 1
a Zener diode with a lower breakdown voltage is used to protect the element
Data Source
AI summary
Provided are a semiconductor element and a semiconductor device capable of achieving on-resistance reduction and miniaturization. The semiconductor element is used in a semiconductor switch for protecting an electric circuit, and includes a semiconductor substrate SB, a MOS transistor Tr provided on the semiconductor substrate SB, and a source electrode SE provided on a front surface 2a side of the semiconductor substrate SB. The MOS transistor Tr includes an n-type source region 8 connected to the source electrode SE, an n-type drift region 21 arranged away from the source region 8, and a p-type well region 31 arranged between the source region 8 and the drift region 21. The source region 8 is interposed between the source electrode SE and the well region 31.