Integrated Motion Motor Controller Shared Cache
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Solution Overview
Problem
Conventional distributed control architectures for motion and motor control in industrial automation are costly, occupy large space, and suffer from data transmission bottlenecks and interference, with simple integration of motion and motor controllers failing to enhance cooperation effectively.
Innovation Solution
An integrated controller with a first processor for motion control and a second processor for motor control, sharing a cache and dedicated shared memory, configured for symmetric multiprocessing with asymmetric operation to improve data transmission and reduce hardware redundancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If distributed control architecture with multiple controllers is used, then motion control and motor control functions are achieved, but hardware cost and space occupation increase
Solution Approach 1:
The patent combines motion control and motor control functions into a single integrated controller. The controller includes a motion control module for calculating kinematic parameters and a motor control module for executing motor commands, both within one device. This merging eliminates the need for separate motion controllers and motor controllers, reducing hardware complexity while maintaining reliable control functionality through internal module coordination.
2Loss of information
If bus communication is used for data transmission between controllers, then data exchange is achieved, but data transmission rate and volume are limited
Solution Approach 1:
The patent extracts the data transmission function from external bus communication and implements it through direct internal memory sharing between control modules. The motion control module and motor control module share access to the same memory space, allowing high-speed data exchange without relying on external bus protocols. This eliminates communication bottlenecks and enables faster feedback loops for real-time control.
3Loss of information
If bus communication is used for data transmission, then data exchange between controllers is achieved, but communication becomes vulnerable to interference
Solution Approach 1:
By merging the motion control and motor control modules into a single integrated controller with shared memory, the patent eliminates external bus communication that is susceptible to electromagnetic interference. The internal memory sharing architecture provides shielded, reliable data transmission paths within the controller housing, protecting against external interference while maintaining complete and accurate data exchange between control functions.
4Adaptability or versatility
If simple physical combination of motion controller and motor controller is used, then integration is achieved, but cooperation improvement is limited
Solution Approach 1:
The patent segments the integrated controller into distinct functional modules: a motion control module for trajectory planning and kinematic calculations, and a motor control module for real-time motor actuation. These segmented modules communicate through shared memory with defined interfaces, enabling sophisticated cooperation and coordination while maintaining functional independence. This modular segmentation allows each module to optimize its performance while working together seamlessly.
Data Source
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AI summary
An integrated controller for motion control and motor control comprises a first processor, a second processor, a cache and a shared memory. The first processor is configured to run an operating system and at least perform motion control. The second processor is configured to at least perform motor control and normally not run the operating system. The cache is coupled to the first processor and the second processor. The shared memory maps onto the cache. The first processor and the second processor are configured to share the shared memory and accordingly perform data transmission via the cache during the periods of motion control and motor control. The first processor, the second processor and the cache are integrated in a same chip.