Integrated MRAM and Inductor Using Shared Interconnect Levels
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Solution Overview
Problem
Current magnetic random access memory (MRAM) technologies are not integrated with inductors, leading to increased manufacturing costs and design complexity due to the need for off-chip inductors, which require additional space and resources.
Innovation Solution
Integration of a magnetic inductor with MRAM cells on the same substrate using a method that includes forming metal lines in upper interconnect levels and coupling them with via contacts to create coils, allowing for both memory and inductive functions within a single integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If inductor is implemented off-chip, then inductive function is provided, but additional area is needed in package or circuit board increasing overall footprint
Solution Approach 1:
The patent merges the inductor and MRAM cell into a single integrated structure on the same chip. The inductor is formed using metal interconnect layers that are also used for MRAM wiring, with via contacts coupling different metal levels to create inductive loops. This integration eliminates the need for separate off-chip inductors, reducing overall footprint while maintaining functionality.
2Ease of manufacture
If inductor is implemented off-chip, then inductive function is provided, but manufacturing cost increases
Solution Approach 1:
The inductor is manufactured using the same semiconductor fabrication processes as the MRAM cell, including metal deposition, patterning, and via formation. This integrated manufacturing approach reduces the number of discrete components and assembly steps, lowering manufacturing costs while improving reliability through consistent process control and reduced interconnect interfaces.
3Adaptability or versatility
If inductor is implemented off-chip, then inductive function is provided, but design flexibility decreases
Solution Approach 1:
The metal interconnect layers serve dual purposes: providing wiring for the MRAM cell and forming the inductor structure. The same via contacts and metal lines that connect MRAM components are configured to create inductive loops. This multi-functionality allows the design to be adapted for different RF applications without requiring separate inductor design processes, enhancing design flexibility.
Data Source
AI summary
Devices and methods of forming a device are disclosed. The method includes providing a substrate defined with at least first and second regions. A first upper dielectric layer is provided over the substrate. The first upper dielectric layer comprises a first upper interconnect level with a plurality of metal lines. A dielectric layer is formed over the first upper dielectric layer. The dielectric layer includes a second upper interconnect level with a plurality of metal lines. A magnetic random access memory (MRAM) cell is formed between the first and second upper interconnect levels in the first region. An inductor is formed in the second region. The inductor includes a lower inductor level formed from metal lines in the first upper interconnect level and an upper inductor level formed from metal lines in the second upper interconnect level. The metal lines in the lower inductor level and upper inductor level are coupled by via contacts to form loops of the inductor.