Integrated Power FET Package for Compact Multi-Phase Bridge Circuits
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Solution Overview
Problem
Existing multi-phase bridge circuits face challenges in achieving compact size, high current density, low thermal power dissipation, and reduced component count while minimizing on-board parasitics, particularly in power electronics applications like motor drivers and power converters.
Innovation Solution
Integrating power field-effect transistors (FETs), pre-drivers, and controllers into a common multi-chip package, where at least two high-side and low-side FETs are placed on shared dies, reducing the number of thermal pads and allowing for a more compact design with shared drain or source substrates, and optionally incorporating sense resistors to further reduce components and area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If discrete components are used for power FETs, pre-drivers, and sense resistors, then design flexibility is improved, but board space is excessive and reliability is reduced
Solution Approach 1:
The patent combines multiple discrete components (power FETs, pre-driver circuitry, sense resistors, and control logic) into a single integrated power management IC. This merging eliminates the need for separate discrete components while maintaining design flexibility through integrated functionality, directly reducing board space occupancy.
Solution Approach 2:
The integrated power management IC performs multiple functions including power switching, pre-driving, sensing, and control within a single device. This multi-functionality replaces what previously required multiple specialized discrete components, achieving space reduction while preserving design versatility.
2Adaptability or versatility
If discrete components are used for power FETs, pre-drivers, and sense resistors, then design flexibility is improved, but device complexity and assembly are increased
Solution Approach 1:
The patent integrates power FETs, pre-driver circuitry, sense resistors, and control logic into a single power management IC, reducing the number of discrete components that must be individually placed and assembled. This merging simplifies the assembly process while maintaining design flexibility through the integrated device's configurable functionality.
3Measurement precision
If discrete sense resistors are used, then measurement capability is provided, but ohmic losses and device heating are increased
Solution Approach 1:
The patent implements sense resistors with different resistance values in different regions of the integrated circuit to optimize current sensing for specific applications. By locally tailoring the resistance characteristics, the design achieves accurate current measurement while minimizing ohmic losses and heat generation compared to using discrete sense resistors.
Solution Approach 2:
The integrated sense resistors are designed with optimized resistance parameters that balance measurement precision with energy loss minimization. The resistance values are specifically tailored to reduce ohmic losses while maintaining adequate current sensing capability, addressing the trade-off between measurement accuracy and energy efficiency.
4Power
If current FETs are used, then power switching is achieved, but reliable operation at high frequencies is limited by inductance
Solution Approach 1:
The patent nests the power FETs, pre-driver circuitry, and control logic in a hierarchical integrated structure where the pre-driver is embedded within the same device as the power FETs. This nesting minimizes the trace length and inductance between components, enabling reliable high-frequency operation while maintaining power switching capability.
Solution Approach 2:
The patent transitions from a planar discrete component layout to a three-dimensional integrated circuit architecture. By stacking and integrating components vertically within the same device, the design reduces the effective inductance and parasitic elements, enabling high-frequency operation that would be limited in discrete implementations.
Data Source
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AI summary
In described examples of techniques for integrating power field-effect transistors (FETs), pre-drivers, controllers, and/or resistors into a common multi-chip package for implementing multi-phase bridge circuits, the techniques may provide a multi-chip package (62) with at least two high-side (HS) FETs (80) and at least two low-side (LS) FETs (82, 84, 86), and place the at least two HS FETs or the at least LS FETs on a common die (80). Placing at least two FETs on a common die may reduce the number of die and the number of thermal pads (i.e., die pads) needed to implement a set of power FETs, thereby decreasing component count of a multi-phase bridge circuit and/or allowing a more compact, higher current density multi-phase bridge circuit to be obtained without significantly increasing thermal power dissipation of the circuit.