Integrated Power Module with Embedded Passive Component
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional integrated power modules (IPMs) are bulky and costly due to the need for significant area to accommodate power and logic dies, with complex process steps and high costs associated with inlaying power semiconductor modules within logic printed circuit boards.
Innovation Solution
An integrated power module design featuring a power semiconductor die attached to a metallized side of an insulating substrate with a structured metallization layer and electrically conductive vias, combined with an embedded laminate structure that includes logic or passive semiconductor dies, optimizing space and reducing complexity through direct copper bonding and multi-layer circuit board technology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power dies are surface mounted to a separate logic printed circuit board with rigid connectors, then electrical connection is achieved, but the overall size and cost of the IPM increases
Solution Approach 1:
The patent merges the power electronic substrate and logic printed circuit board into a single integrated substrate structure. Power dies and logic dies are both mounted on the same substrate, eliminating the need for separate boards and rigid connectors. This integration directly reduces the overall IPM size while maintaining reliable electrical connections through optimized trace routing and vias on the unified substrate.
Solution Approach 2:
The patent transitions from a three-dimensional assembly of separate boards connected by vertical rigid connectors to a planar two-dimensional integrated substrate layout. By flattening the structure and routing connections laterally across the substrate rather than vertically between boards, the patent significantly reduces the IPM footprint and eliminates the height occupied by connector assemblies.
2Area of stationary object
If power semiconductor module is inlaid within the logic printed circuit board, then area is reduced, but process complexity and cost increase significantly
Solution Approach 1:
The patent segments the substrate into distinct functional regions: a power electronic substrate area for mounting power dies and a logic circuit board area for mounting logic dies, separated by isolation structures. This segmentation allows each region to be optimized independently with appropriate materials and designs while maintaining a relatively simple overall manufacturing process compared to full inlay techniques.
Solution Approach 2:
The patent introduces isolation structures (such as isolation layers or isolation walls) as intermediary elements between the power electronic substrate and logic printed circuit board areas. These intermediaries provide electrical isolation and mechanical separation without requiring complex inlay processes, enabling area reduction while keeping manufacturing straightforward.
3Ease of manufacture
If conventional IPM designs are used with significant area for various parts, then manufacturing is simpler, but the overall size and cost increase
Solution Approach 1:
The patent creates a universal substrate that serves multiple functions: it acts as both the power electronic substrate and the logic printed circuit board, provides mechanical support for both power and logic dies, and serves as the heat dissipation path. This multi-functionality eliminates the need for separate components and assemblies, reducing IPM volume while maintaining manufacturing simplicity through standardized substrate fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a smaller, more cost-effective IPM with improved heat dissipation and reduced footprint, offering short electrical paths and scalable interconnects, thereby enhancing performance and reducing overall size and cost.
Implementation Method 1
a direct copper bonded (DCB) substrate comprising a ceramic substrate, a first copper metallization bonded to a first main surface of the ceramic substrate and a second copper metallization bonded to a second main surface of the ceramic substrate opposite the first main surface
Implementation Method 2
a first plurality of electrically conductive vias extending through the first isolation layer from the first structured metallization layer to the power semiconductor die and the passive component
Data Source
AI summary
A power semiconductor module includes a power semiconductor die attached to the first metallized side, a passive component attached to the first metallized side, a first isolation layer encapsulating the power semiconductor die and the passive component, a first structured metallization layer on the first isolation layer, and a first plurality of electrically conductive vias extending through the first isolation layer from the first structured metallization layer to the power semiconductor die and the passive component.