Integrated Processing Element Structure for CNN and RNN Operations
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Solution Overview
Problem
Conventional two-dimensional convolution operations in CNNs are inefficient due to unnecessary operations caused by filter sparsity and require separate processing element structures for CNN and RNN, leading to suboptimal operational speed and memory usage.
Innovation Solution
An integrated processing element structure that supports both CNN and RNN operations by employing a mesh and tree topology network structure, optimizing data transmission paths and reducing unnecessary operations through one-dimensional filter application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If two-dimensional convolution operation is performed in conventional CNN, then the operation can be completed, but operational speed is reduced and memory usage increases due to unnecessary operations from filter sparsity
Solution Approach 1:
The patent extracts and eliminates unnecessary operations from the convolution process by identifying and skipping computations where filter elements are zero. The operation module selectively performs multiplications only for non-zero filter elements, removing wasteful computational steps while maintaining the same convolution functionality.
Solution Approach 2:
The patent introduces dynamic operation paths within the processing elements. The data transmission paths and computation paths are dynamically adjusted based on the sparsity pattern of the filter, allowing the system to adaptively optimize computational efficiency for each specific convolution operation.
2Adaptability or versatility
If separate processing element structures are used for CNN and RNN, then each network type can be supported, but device complexity increases and operational efficiency decreases
Solution Approach 1:
The patent designs a universal processing element structure that can perform both CNN convolution operations and RNN operations. The same PE array and data transmission paths are configured to support multiple network architectures, eliminating the need for separate hardware structures for different neural network types.
Solution Approach 2:
The patent employs dynamic reconfiguration of data transmission paths within the unified PE structure. The same hardware resources are dynamically allocated and configured depending on whether CNN or RNN operations are being performed, allowing one structure to serve multiple functions efficiently.
3Productivity
If conventional CNN convolution operation is performed, then the computation is completed, but memory usage increases due to sparsity of filter
Solution Approach 1:
The patent extracts only the necessary computational elements from the filter by identifying non-zero elements and selectively loading them into the operation module. This reduces the amount of data that needs to be stored and transmitted through memory, directly reducing memory usage while maintaining computational completeness.
Data Source
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AI summary
An electronic apparatus for performing machine learning a method of machine learning, and a non-transitory computer-readable recording medium are provided. The electronic apparatus includes an operation module configured to include a plurality of processing elements arranged in a predetermined pattern and share data between the plurality of processing elements which are adjacent to each other to perform an operation; and a processor configured to control the operation module to perform a convolution operation by applying a filter to input data, wherein the processor controls the operation module to perform the convolution operation by inputting each of a plurality of elements configuring a two-dimensional filter to the plurality of processing elements in a predetermined order and sequentially applying the plurality of elements to the input data.