Integrated Semiconductor Device with Dielectric Islands
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Solution Overview
Problem
Conventional semiconductor devices, such as VDMOS, are typically packaged independently, leading to increased process costs and larger chip areas due to separate packaging of enhanced and depletion devices.
Innovation Solution
An integrated semiconductor device is developed, featuring a semiconductor substrate with a first dopant type epitaxial layer, second dopant type deep wells, dielectric islands, gate structures, and first dopant type source regions, where the dielectric islands and trenches are strategically positioned to minimize ion implantation and enhance breakdown voltage, allowing for the integration of depletion and enhanced devices in a single package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor devices are packaged independently, then each device can be optimized separately, but the process cost increases and chip area increases
Solution Approach 1:
The patent combines enhanced and depletion devices into a single integrated semiconductor device structure. Both device types share common components including the semiconductor substrate, epitaxial layer, deep wells, gate structures, and source/drain regions. This merging eliminates the need for separate packaging and processing of individual devices, thereby reducing process costs while maintaining the ability to optimize each device type through selective doping and structural configuration.
2Reliability
If conventional semiconductor devices are packaged independently, then each device can be optimized separately, but the chip area increases
Solution Approach 1:
The patent integrates enhanced and depletion devices in a shared semiconductor structure, allowing both device types to coexist on the same chip area. Common structures such as the epitaxial layer, deep wells, and gate structures are shared between device types, significantly reducing the total chip area required compared to separate packaging arrangements.
Solution Approach 2:
The integrated device structure serves multiple functions simultaneously. The same semiconductor substrate and epitaxial layer support both enhanced and depletion device operations. The gate structures and source/drain regions are configured to enable both enhancement-mode and depletion-mode device characteristics, achieving multi-functionality within a unified structure that minimizes chip area.
3Reliability
If dielectric islands are positioned to minimize ion implantation, then breakdown voltage improves, but device structure complexity increases
Solution Approach 1:
The patent employs dielectric islands positioned in specific regions between deep wells to provide localized electrical isolation and control ion implantation in critical areas. The dielectric material is selectively placed where it most effectively prevents unwanted ion implantation and enhances breakdown voltage, while leaving other regions open for device formation. This localized approach improves breakdown characteristics without requiring complex dielectric structures throughout the entire device.
Data Source
AI summary
The present application provides an integrated semiconductor device and an electronic apparatus, comprising a semiconductor substrate and a first doped epitaxial layer having a first region, a second region, and a third region; a partition structure is arranged in the third region; the first region is formed having at least two second doped deep wells, and the second region is formed having at least two second doped deep wells; a dielectric island partially covers a region between two adjacent doped deep wells in the first region and second region; a gate structure covers the dielectric island; a first doped source region is located on the two sides of the gate structure, and a first doped source region located in the same second doped deep well is separated; a first doped trench is located on the two sides of the dielectric island in the first region, and extends laterally to the first doped source region.