Integrated Semiconductor and Inductor Package for High Power Density
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Solution Overview
Problem
The challenge in computing platforms is to deliver higher currents with increasing power demands while minimizing board space, requiring higher power density solutions for voltage regulators, which is hindered by the space occupied by active and passive components and thermal stress.
Innovation Solution
Integrating semiconductor chips and passive components, such as inductors, into a single package, where the chips are directly connected to the passive components, reducing board space consumption and improving efficiency by reducing parasitic inductances and trace resistances, and utilizing the passive components as heat sinks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If active and passive components are integrated into one package, then board space is reduced and power density is increased, but manufacturing complexity and thermal management difficulty increase
Solution Approach 1:
The patent combines active components (semiconductor chips) and passive components (inductors) into a single integrated package, eliminating the need for separate board mounting of these components. This merging directly reduces board space occupation while maintaining all necessary electrical functions within the compact module.
Solution Approach 2:
The semiconductor chips are positioned on top of the inductor structure, with the inductor serving as both a functional component and a mounting substrate. This nested arrangement allows the active components to be placed within the vertical space above the passive component, maximizing space utilization and reducing the overall footprint.
2Power
If higher currents are delivered with increasing power demands, then power density is increased, but thermal stress and efficiency losses increase
Solution Approach 1:
The patent extracts and eliminates the parasitic inductances and trace resistances that normally exist in separate component configurations by directly integrating the semiconductor chips with the inductor. This removal of parasitic elements reduces energy losses and improves efficiency while enabling higher current delivery.
Solution Approach 2:
The module employs a composite structure combining magnetic materials for the inductor with semiconductor materials for the active components, creating an integrated system that optimizes both electrical performance and thermal characteristics for high power density applications.
3Power
If higher currents are delivered with increasing power demands, then power density is increased, but thermal stress increases
Solution Approach 1:
The inductor structure serves dual functions: as an electrical component and as a heat sink for the mounted semiconductor chips. The passive component's mass and thermal conductivity are utilized to dissipate heat generated by the active components, enabling the system to handle higher power densities without excessive thermal stress.
4Loss of energy
If semiconductor chips are directly connected to passive components, then parasitic inductances and trace resistances are reduced improving efficiency, but manufacturing precision requirements increase
Solution Approach 1:
The semiconductor chips are pre-positioned and connected to the inductor structure during the module assembly process before final packaging. This preliminary integration ensures precise electrical connections are established while the components are accessible, reducing parasitic elements and maintaining manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for significant reductions in board space usage, increased switching frequencies up to 1-2 MHz, and efficient heat management, achieving high power density and low thermal stress.
Implementation Method 1
utilizing the passive components as heat sinks
Data Source
AI summary
A method for manufacturing an electronic module is disclosed. In an embodiment the method includes providing a passive component having an upper surface of a first area, and electrically and mechanically attaching a first semiconductor chip having a lower surface of a second area that is smaller than the first area to the passive component, wherein the lower surface of the first semiconductor chip is arranged on the upper surface of the passive component, and wherein the first semiconductor chip comprises a vertical field-effect transistor.