Integrated Semiconductor Device Merging MOSFET and DRAM

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor devices, such as DRAM and MOSFET, are independent entities leading to data transmission delays, especially in big data processing, and pose challenges in miniaturization and production cost control.

Innovation Solution

A semiconductor device and fabrication method that integrates a semiconductor body with doped regions and a gate structure on a dielectric substrate, featuring a protrusion portion and symmetric structures to function as either a MOSFET or DRAM, allowing for shared fabrication and operation modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DRAM and MOSFET are provided as independent devices, then data storage and transmission functions are achieved, but data transmission delay occurs and performance degradation happens

Engineering Contradiction:
Improvedata transmission performanceVSAvoiddata transmission delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges DRAM and MOSFET into a single integrated device structure where the semiconductor body serves dual functions. The same semiconductor body with doped regions and gate structure can operate as either a storage element (DRAM) or a switching element (MOSFET), eliminating the need for separate devices and reducing data transmission delay between them.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The invention creates a universal semiconductor device that can function as both DRAM and MOSFET depending on operational configuration. By designing the semiconductor body with specific doped regions (first and second doped regions) and gate structures, the device achieves multi-functionality, allowing it to serve as storage or transmission element as needed, thus improving overall system performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If DRAM and MOSFET are provided as independent devices, then data storage and transmission functions are achieved, but miniaturization becomes difficult and production cost increases

Engineering Contradiction:
Improvedata storage and transmission functionVSAvoiddevice structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines what were previously two separate devices (DRAM and MOSFET) into one integrated semiconductor structure. This merging reduces the total number of discrete components, simplifies device architecture, enables better miniaturization, and reduces production costs while maintaining both data storage and transmission functions within the same device.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By designing a universal semiconductor body that can operate in multiple modes (as DRAM or MOSFET), the invention reduces device complexity. Instead of requiring separate optimized structures for storage and transmission, a single multi-functional device structure achieves both functions, thereby simplifying the overall device architecture and reducing manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9825039B1Semiconductor device and fabrication method thereof
Publication Date: 2017.11.21 UNITED MICROELECTRONICS CORP
  • US9825039B1 patent drawing
  • US9825039B1 patent drawing
  • US9825039B1 patent drawing

AI summary

A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor body, a first doped region, a second doped region, a gate and a dielectric layer. The semiconductor body is disposed on a dielectric substrate and has a protrusion portion, a first portion and a second portion. The first portion and the second portion are respectively disposed at two opposite sides of the protrusion portion. The first doped region is disposed in a top of the protrusion portion. The second doped region is disposed in an end of the first portion far away from the protrusion portion. The gate is disposed on the first portion and adjacent to the protrusion portion. The dielectric layer is disposed between the gate and the protrusion portion, and between the gate and the first portion.