Integrated Shift Register Circuit for Narrow-Border OLED Displays

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Solution Overview

Problem

Existing display technologies face challenges in reducing the border width due to the space occupied by gate on array (GOA) circuits, which are necessary for providing driving signals, making it difficult to achieve narrow borders in LED and OLED displays.

Innovation Solution

A shift register is introduced that integrates an input circuit, processing circuit, and output circuit to provide stable driving signals, reducing the need for capacitors and allowing for a compact design that combines gate and light-emitting control signals, thereby minimizing space usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple groups of GOA circuits are used to provide driving signals for pixel circuits, then the driving signal requirements are met, but the space occupied by GOA circuits increases making it difficult to reduce border width

Engineering Contradiction:
Improvedriving signal provisionVSAvoidborder width
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple GOA circuit functions into a single integrated shift register unit. The shift register integrates input circuits, processing circuits, and output circuits that collectively provide both gate driving signals and light-emitting control signals, eliminating the need for separate GOA circuit groups and reducing the border area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shift register is designed as a multi-functional circuit that simultaneously performs gate driving signal generation and light-emitting control signal generation. This universal circuit replaces multiple specialized GOA circuits, achieving the same driving signal requirements while occupying less space.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If GOA circuits are integrated on array substrate to drive displays, then display functionality is achieved, but the occupied space prevents narrow border design

Engineering Contradiction:
Improvedisplay driving capabilityVSAvoidborder area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the functions of multiple GOA circuits into a single shift register integrated on the array substrate. The shift register combines input circuits, processing circuits, and output circuits to provide both gate driving signals and light-emitting control signals, achieving full display driving capability in a compact form factor that enables narrow border design.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If separate circuits are used for gate driving signals and light-emitting control signals, then signal stability is maintained, but circuit complexity and space usage increase

Engineering Contradiction:
Improvesignal stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines separate gate driving signal circuits and light-emitting control signal circuits into a single integrated shift register. The input circuits receive input signals and generate intermediate signals, which are then processed by processing circuits to produce both gate driving signals and light-emitting control signals. This integrated approach maintains signal stability through dedicated processing paths while reducing overall circuit complexity and space usage.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12374296B2Shift register, driving circuit, driving method and display device
Publication Date: 2025.07.29 BEIJING BOE TECH DEV CO LTD
  • US12374296B2 patent drawing
  • US12374296B2 patent drawing
  • US12374296B2 patent drawing

AI summary

A shift register, a driving circuit, a driving method and a display device are provided. The shift register includes: an input circuit configured to provide a first voltage or a second voltage to a first node and a light-emitting control signal terminal under control of a first input signal and a second input signal; a processing circuit configured to provide the first voltage or the second voltage to a second node under control of the first input signal and a potential of the first node; and an output circuit configured to provide the first voltage or the second voltage to a first output scanning signal terminal under control of a first clock signal and the potential of the first node, and provide the first voltage or the second voltage to a second output scanning signal terminal under control of a potential of the first output scanning signal terminal.