Integrated Test Circuit Layout for Relay-Free High-Speed IC Testing

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Solution Overview

Problem

Existing testing apparatuses face challenges in simultaneously performing high-speed functional tests and parametric tests without interference from parasitic capacitances caused by relays, leading to inaccuracies and inefficiencies.

Innovation Solution

The integration of a measurement circuit between the voltage generation circuit and pulse generation circuit, allowing for separate control of functional and parametric tests, with relays only present in non-high-speed signal paths, and the use of a common substrate for these circuits to minimize parasitic capacitance effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If relays are used to switch between functional test and parametric test modes, then test mode switching is enabled, but parasitic capacitances are introduced causing measurement inaccuracies

Engineering Contradiction:
Improvetest mode switching capabilityVSAvoidmeasurement accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent extracts and removes the relay components from the signal paths used for high-speed functional testing. By taking out the relays from these critical paths, the parasitic capacitances they introduce are eliminated, thereby improving measurement accuracy while maintaining the ability to switch between test modes through alternative relay-free mechanisms.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the test circuit into separate functional blocks: a first circuit for functional testing and a second circuit for parametric testing. This segmentation allows each circuit to be optimized for its specific purpose, with the second circuit excluding relays to avoid parasitic capacitances during high-speed operations, while the first circuit can use relays for mode switching without interfering with high-speed signal paths.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If separate circuits are used for functional testing and parametric testing, then test accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvetest accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the functional testing circuit and parametric testing circuit into a unified test apparatus that shares common components such as the device under test interface and control mechanisms. This merging approach allows both testing functions to coexist without requiring completely separate physical systems, thereby reducing overall device complexity while maintaining the accuracy benefits of dedicated circuits for each test type.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If relays are present in high-speed signal paths, then test mode switching is possible, but signal interference and parasitic capacitances occur

Engineering Contradiction:
Improvemode switching capabilityVSAvoidsignal interference
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts relay components from the high-speed signal paths used during functional testing. By removing relays from these critical paths, the harmful parasitic capacitances and signal interferences they cause are eliminated, allowing high-speed signals to pass without distortion while still enabling mode switching through alternative relay-free mechanisms.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary control mechanism that enables mode switching between functional and parametric testing without requiring relays in the signal paths. This intermediary approach allows the system to switch test modes while keeping the high-speed signal paths clear of relay-induced parasitic capacitances and interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260023117A1Test circuit, test apparatus and test method
Publication Date: 2026.01.22 ADVANTEST CORP
  • US20260023117A1 patent drawing
  • US20260023117A1 patent drawing
  • US20260023117A1 patent drawing

AI summary

Provided is a testing circuit including a voltage supply unit which generates an output voltage, a pulse generation unit which generates a pulse signal by using the output voltage from the voltage supply unit in a functional test of a device under test and supplies the pulse signal to a device under test, and a measurement circuit which adjusts a voltage or a current supplied to a device under test in a voltage application current measurement test or a current application voltage measurement test of a device under test to a test voltage or a test current and performs the voltage application current measurement test or the current application voltage measurement test by using the test voltage or the test current, in which the measurement circuit is connected at least between the voltage supply unit and the pulse generation unit.