Integrated VCO Calibration Architecture Without a Separate Calibration VCO

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Solution Overview

Problem

Current automotive radar products are bulky due to discrete component assembly and suffer from noise susceptibility in tuning voltage transmission, as well as increased cost and space usage from requiring a separate calibration VCO for frequency calibration.

Innovation Solution

A free-running VCO operates in two modes: normal and calibration, with frequency calibration using a phase lock loop and DAC voltage comparison, and a reference crystal oscillator located on the DSP module, reducing noise susceptibility and eliminating the need for a separate calibration VCO.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If discrete components are assembled on printed circuit boards to create automotive radar products, then the system can be constructed using conventional components, but the overall size becomes bulky and component isolation becomes difficult

Engineering Contradiction:
Improveease of manufactureVSAvoidsize
Core Design Contradiction:
Ease of manufactureVSVolume of moving object

Solution Approach 1:

The patent combines multiple discrete components (VCO, PLL, crystal oscillator, mixers, filters) into a single integrated circuit chip. This merging eliminates the need for separate printed circuit boards and discrete component assembly, directly reducing the overall system size while maintaining manufacturing feasibility through standard IC fabrication processes

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated circuit performs multiple functions simultaneously: frequency generation (VCO), frequency calibration (PLL), signal mixing, filtering, and temperature compensation. This multi-functionality consolidates what previously required separate components and circuits into a single device, reducing bulk without compromising manufacturing capability

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If the tuning voltage is transmitted from the DSP module to the VCO through a board-to-board connection, then the VCO can be tuned independently, but the tuning voltage becomes more susceptible to noise

Engineering Contradiction:
Improvetuning capabilityVSAvoidnoise susceptibility
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The DSP module and VCO are integrated into the same chip, eliminating external board-to-board connections for tuning voltage transmission. The tuning voltage is generated and applied internally within the integrated circuit, removing the external transmission path that was susceptible to noise interference

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated circuit structure itself acts as an intermediary, providing internal signal routing that shields the tuning voltage from external noise sources. The close integration allows for controlled impedance paths and reduced exposure to electromagnetic interference compared to external connections

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If a separate calibration VCO is used for frequency calibration, then the free-running VCO can be accurately calibrated, but the system cost increases and valuable space is occupied

Engineering Contradiction:
Improvefrequency calibration accuracyVSAvoidnumber of components
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The single VCO in the integrated circuit serves dual functions: it operates as a free-running VCO during normal radar operation and as a calibration VCO when frequency calibration is needed. This eliminates the need for a separate calibration VCO, reducing component count and space while maintaining calibration accuracy through software-controlled operation modes

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The VCO dynamically switches between two operational states: free-running mode for normal radar signal generation and calibration mode for frequency accuracy. The PLL circuit is selectively enabled during calibration mode to provide the reference frequency comparison, then disabled during normal operation. This dynamic reconfiguration allows one component to replace what previously required two separate components

Inventive Principle:
Principle #15Dynamics

4Object-affected harmful factors

If the PLL architecture is isolated from the free-running VCO to avoid signal interference, then noise from calibration signals is reduced, but the calibration process becomes more complex and requires separate components

Engineering Contradiction:
Improvesignal interferenceVSAvoidisolation requirements
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The PLL circuit dynamically switches between isolated and integrated states. During calibration mode, the PLL is activated and temporarily coupled to the VCO for frequency comparison and calibration. During normal operation, the PLL is deactivated and isolated, preventing interference. This time-division approach allows close integration without continuous interference, eliminating the need for physical separation or shielding

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The calibration process occurs periodically in brief intervals rather than continuously. During these short calibration windows, the PLL is activated to compare frequencies and adjust the VCO. For the majority of time during normal radar operation, the PLL remains isolated. This periodic activation minimizes interference exposure while maintaining calibration capability with integrated components

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a more compact and cost-effective frequency calibration method with improved noise isolation and reduced size, enhancing the integration and efficiency of automotive radar systems.

Implementation Method 1

In the calibration mode, the frequency of the free running VCO is set to a desired calibration frequency using a phase lock loop

Methodology Applied
Scientific EffectPhase lock loop:

Implementation Method 2

When the free-running oscillator is swept over a frequency range which encompasses the reference frequency, a mixer translates the reference frequency to direct current (DC), causing an impulse in the baseband filter

Methodology Applied
Scientific EffectMixing:

Data Source

PatentUS7804369B2Integrated frequency calibration architecture
Publication Date: 2010.09.28 VIASAT INC
  • US7804369B2 patent drawing
  • US7804369B2 patent drawing
  • US7804369B2 patent drawing

AI summary

In an exemplary embodiment, a free running VCO has two modes: a normal operating mode and a calibration mode. In the calibration mode, the free running VCO is phase lock looped with itself instead of a calibration VCO. Furthermore, in an exemplary embodiment, a tuning voltage for the free running VCO is adjusted to offset any tuning error. In addition, in various embodiments a reference crystal oscillator used in the phase lock loop is located on a DSP module instead of on the RF module. In yet another exemplary embodiment, the free running VCO is the only high frequency VCO on a radio frequency module.