Integrated Wafer Wet Processing Layout to Cut Transfer Time
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Solution Overview
Problem
The fabrication of semiconductor devices involves numerous processing steps, with transportation between different processing chambers being time-consuming, which can affect the yield of semiconductor devices.
Innovation Solution
A semiconductor structure manufacturing system is integrated with both bath-type and single-type processing tools, reducing transportation time between chambers, optimizing cleanroom space, and enhancing processing efficiency through in-situ processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple separate processing chambers are used for different processing operations, then processing functionality is improved, but transportation time between chambers increases
Solution Approach 1:
The patent combines multiple processing chambers (oxidation chamber, diffusion chamber, ion implantation chamber) into a single integrated processing system that can perform different processing operations sequentially without removing the wafer, thereby eliminating transportation time while maintaining diverse processing functionality
Solution Approach 2:
The processing chamber is designed with multi-functionality to perform oxidation, diffusion, and ion implantation operations using different processing gases and conditions, allowing a single chamber to replace multiple specialized chambers
2Adaptability or versatility
If multiple separate processing chambers are used, then processing specialization is improved, but cleanroom space requirements increase
Solution Approach 1:
Multiple specialized processing chambers are merged into a single integrated chamber, reducing the total cleanroom space required while maintaining the ability to perform specialized oxidation, diffusion, and ion implantation processes through controlled gas environments and processing parameters
3Device complexity
If transportation between processing chambers is required, then processing modularity is improved, but manufacturing yield decreases
Solution Approach 1:
The patent integrates multiple processing functions in one chamber to eliminate wafer transportation, thereby preventing contamination and yield loss that would occur during transfer between chambers, while still maintaining processing modularity through programmable gas sequences and parameter control
Data Source
AI summary
A semiconductor structure manufacturing system is provided. The system includes a load lock chamber, first chambers, second chambers and a first robot. The load lock chamber is configured to store wafers that are to be processed. The first chambers are configured to process the wafers. Each of the first chambers has first stage plates for supporting the wafers. The second chambers are configured to process a single wafer. Each of the second chambers has a second stage plate for supporting a wafer. The first robot is configured to transport the wafers from the load lock chamber to the first chambers. The first robot is arranged between the first chambers, the second chambers and the load lock chamber.


