Integrating ADC Noise Shaping for Fast High-Resolution Conversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges in achieving high resolution while maintaining fast conversion speed and low power consumption, particularly in integrating ADCs that rely on dual-slope conversion methods.
Innovation Solution
The implementation of a feedforward noise shaping loop with noise shaping capacitors and a comparator that adjusts the threshold based on quantization error signals, allowing for high resolution and quick conversion times with reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If integrating ADC uses longer integration times to achieve higher resolution, then measurement precision is improved, but conversion speed deteriorates
Solution Approach 1:
The patent implements a noise shaping feedback loop where the quantization error from the comparator is fed back through a noise shaping capacitor to the integrator input. This feedback mechanism shapes the quantization noise spectrum, pushing noise to higher frequencies where it can be filtered, thereby improving effective resolution without requiring longer integration times.
Solution Approach 2:
The patent changes the parameter of integration time from a fixed long duration to a shorter variable duration compensated by noise shaping. The noise shaping capacitor dynamically adjusts the effective resolution by redistributing quantization error, allowing high precision measurements to be achieved in shorter time periods than traditional integrating ADCs.
2Measurement precision
If integrating ADC uses longer integration times to achieve higher resolution, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The noise shaping feedback loop reduces the required integration time by actively managing quantization error. By feeding back the quantization error through the noise shaping capacitor, the system achieves higher effective resolution in shorter time, thereby reducing the power consumption associated with prolonged integration operations.
Solution Approach 2:
The patent employs periodic switching between integrating the analog input signal and integrating the reference signal to return the integrator output to threshold. This periodic dual-slope action, combined with noise shaping, allows efficient use of integration time, reducing overall power consumption while maintaining high resolution.
3Productivity
If integrating ADC uses shorter conversion times to improve conversion speed, then productivity is improved, but measurement precision deteriorates
Solution Approach 1:
The noise shaping feedback mechanism compensates for the reduced integration time by actively shaping the quantization noise. The feedback loop processes quantization error and feeds it back through the noise shaping capacitor, effectively increasing the signal-to-noise ratio and maintaining high measurement precision even with shorter conversion times.
Solution Approach 2:
The patent changes the effective resolution parameter through noise shaping rather than relying solely on integration time. By using the noise shaping capacitor to redistribute quantization error spectrally, the system achieves high precision measurements in shorter time periods, effectively decoupling resolution from integration duration.
4Productivity
If integrating ADC uses shorter conversion times to improve conversion speed, then productivity is improved, but power consumption decreases
Solution Approach 1:
The noise shaping feedback loop enables the ADC to achieve high resolution in shorter conversion times. By actively managing quantization error through feedback, the system reduces the integration time required for accurate measurements, thereby lowering power consumption while maintaining or improving conversion speed and productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high-resolution analog-to-digital conversion in a short time duration with low power consumption, suitable for applications requiring fast and efficient signal processing.
Implementation Method 1
the integrator integrates the analog input signal for ramping an integrator output
Implementation Method 2
an integrator comprising a capacitor, wherein the integrator is configured to switch between integrating the analog input signal
Implementation Method 3
a comparator for comparing integrator output to the threshold
Implementation Method 4
at least one noise shaping capacitor configured to store a quantization error signal remaining on the integrator output based on digitizing a first sample of the analog input signal
Implementation Method 5
the comparator is configured to receive a feedforward noise shaping signal from the feedforward noise shaping loop based on the quantization error signal stored by the at least one noise shaping capacitor
Data Source
Figure 1
Figure 2
Figure 3
AI summary
An analog-to-digital converter, ADC, circuitry, comprises: an integrator (102; 202) connected to a capacitor (110; 210a, 210b), the integrator (102; 202) being configured to switch between integrating an analog input signal for ramping an integrator output and integrating a reference input signal for returning integrator output towards a threshold; a comparator (120; 220) for comparing integrator output to the threshold; and a timer (150; 250) for determining a time duration during which the reference input signal is integrated, the time duration providing a digital representation of an analog input signal value; the ADC circuitry (100; 200) further comprising a feedforward noise shaping loop (130; 130a, 130b; 230a, 230b) configured to store a quantization error signal based on digitizing a first sample, the comparator (120; 220) being configured to receive a feedforward noise shaping signal for changing the threshold for digitizing a later sample of the analog input signal following the first sample.