Integrating Phase Interpolator With Feedback for Linear Clock Shifting

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Solution Overview

Problem

Legacy phase interpolators face limitations in power consumption, power supply rejection, linear interpolation accuracy, frequency range, and complexity, which are inadequate for high-speed data communication systems, especially in mobile and battery-powered applications.

Innovation Solution

A high-performance phase interpolator design combining two full-wave integrating phase interpolation cores with feedback to form a pseudo-differential interpolator architecture, utilizing in-phase and quadrature-phase digitally-controlled current sources and sinks in a cascode architecture, with feedback circuitry for duty cycle control and reference voltage adjustment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If legacy phase interpolators are used, then the circuit can operate at basic data speeds, but power consumption is high and power supply rejection is poor

Engineering Contradiction:

Improvepower consumptionVSAvoidpower supply rejection

Core Design Contradiction:

Use of energy by stationary objectVSReliability

Solution Approach 1:

The phase interpolator is divided into multiple independent interpolation units, each handling a portion of the phase adjustment range. This segmentation allows each unit to operate at optimized power levels while collectively providing the full phase adjustment range, thereby reducing overall power consumption without compromising power supply rejection

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The circuit dynamically switches between different interpolation units based on the required phase adjustment, enabling the system to operate at lower power states when minimal adjustment is needed while maintaining high performance capability when full adjustment range is required

Inventive Principle:

Principle #15Dynamics

2Manufacturing precision

If legacy phase interpolators are used, then the circuit structure is simpler, but interpolation linearity is poor

Engineering Contradiction:

Improveinterpolation linearityVSAvoidcircuit structure

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

Each interpolation unit is designed with locally optimized components and topologies tailored to its specific phase adjustment function. This allows each unit to achieve high linearity in its operating range, and the collective arrangement of multiple units provides high linearity across the entire phase adjustment range

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent transitions from single-phase interpolation to multi-phase interpolation by introducing multiple interpolation units with different phase references. This dimensional expansion from one to multiple phase dimensions enables highly linear interpolation across the full 360-degree range while distributing the complexity across multiple specialized units

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If legacy phase interpolators are used, then the design is easier to implement, but frequency range is limited

Engineering Contradiction:

Improvefrequency rangeVSAvoiddesign complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The interpolation units are designed with universal functionality to operate across a wide frequency range by accepting clock signals at different frequencies and adjusting their output accordingly. This multi-functional design allows the same circuit architecture to serve multiple frequency requirements without redesign, thereby expanding the operational frequency range while managing complexity through design standardization

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Ease of manufacture

If legacy phase interpolators are used, then the circuit area is smaller, but duty cycle correction is complex and costly

Engineering Contradiction:

Improveduty cycle correctionVSAvoidcircuit area

Core Design Contradiction:

Ease of manufactureVSArea of stationary object

Solution Approach 1:

The interpolation units inherently generate output signals with corrected duty cycles through their symmetric switching architecture and balanced current sources. This self-correcting mechanism eliminates the need for separate duty cycle correction circuits, thereby simplifying the manufacturing process and reducing overall circuit area while maintaining ease of manufacture

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS9485086B2Phase interpolator

Publication Date: 2016.11.01 MARVELL ASIA PTE LTD

AI summary

Apparatus to implement several high performance phase interpolators are disclosed. Some embodiments are directed to a full-wave integrating phase interpolation core comprising two pairs of in-phase and quadrature-phase current DACs arranged in a cascode architecture to drive an integrating capacitor and produce an interpolation voltage waveform. The current DACs are biased, weighted, and controlled by in-phase and quadrature-phase input clocks to yield an interpolation waveform that presents a phase value between the phases of the input clocks. Some embodiments deploying the interpolator core use feedback circuitry and reference voltages to adjust the common mode and amplitude of the interpolation voltage waveform to obtain both optimal performance and operation within the interpolator linear region or output compliance range. Both the single-core and dual-core implementations, as well as other implementations of the interpolator core, exhibit high power supply rejection, highly linear interpolation, a wide frequency range, and low cost duty cycle correction.