Capacitance Sensing Integrator With Remainder Retention
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Solution Overview
Problem
Conventional capacitance sensing systems face limitations in achieving high resolution and dynamic range due to noise immunity issues, sensitivity to external noise, and the need for high-resolution analog-to-digital converters, which can lead to saturation and limited integration time.
Innovation Solution
The proposed system integrates and discharges a sense signal in the same conversion, retaining quantization errors for the next conversion, which helps offset errors and maintain accuracy, thereby improving noise response and reducing the need for baseline compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple sensing cycles are collected by the active integrator to achieve desired sensitivity, then sensitivity is improved, but noise immunity decreases in proportion to the number of sensing cycles
Solution Approach 1:
The patent applies periodic action by using a periodic excitation signal to drive the capacitance sensing system. The integrator accumulates charge over multiple periods of the excitation signal, allowing sensitivity to improve with integration time while the periodic nature helps reject non-synchronous noise, thus maintaining noise immunity despite multiple sensing cycles.
2Measurement precision
If conventional charge transfer systems use multiple sensing cycles to improve sensitivity, then sensitivity is improved, but the dynamic range is limited due to noise spikes driving integrators into saturation
Solution Approach 1:
The patent employs feedback mechanisms where the system monitors the integrator output and adjusts operation to prevent saturation. By detecting when the integrator approaches saturation limits, the system can modulate the excitation signal or integrator gain to maintain operation within the linear range, thus preserving dynamic range while still allowing multiple sensing cycles for improved sensitivity.
3Speed
If conventional systems deliver conversion results after every excitation edge to improve response speed, then response speed is improved, but resolution requires high-resolution ADC operating at low frequency with limited integration time
Solution Approach 1:
The patent resolves this contradiction by moving the high-resolution conversion operation to a different temporal dimension. Instead of requiring high-resolution ADC at every excitation edge, the system accumulates charge over multiple excitation cycles in the integrator, then performs the high-resolution conversion once per integration period. This separates the fast sensing (multiple excitation edges) from the slow high-resolution measurement, achieving both speed and resolution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the system's resolution and linearity while maintaining dynamic range without baseline compensation, effectively managing noise and improving overall performance.
Implementation Method 1
An integrator can be used to integrate the sense signal for a predetermined period of time
Implementation Method 2
Capacitance sensing systems can utilize a mutual capacitance between transmit electrodes and receive electrodes to detect the proximity of an object
Implementation Method 3
The integrator can then be demodulated to extract a modulated signal
Data Source
AI summary
A capacitance sense system can include a capacitance sense input configured to receive an input signal that varies according to a sensed capacitance; an integrator/discharge circuit configured to integrate the input signal and discharge the integrated input signal toward the reference level in conversion operations; and a remainder retainer section configured to quantize the discharging of the integrated input signal, and retain any remainder of the integrated input signal that follows a quantization point for a next conversion by the integrator/discharge circuit.


