Integrity Manager for Multi-Core Heterogeneous Processing Environments

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Solution Overview

Problem

High-integrity computing environments face challenges in multi-core SoC devices due to asynchronous hardware events and internal scheduling, which complicate integrity monitoring and fault detection, especially when using Commercial off-the-shelf (COTS) devices with diverse processing architectures.

Innovation Solution

A high-integrity multi-core heterogeneous processing environment is designed with an application processor and a distinct integrity processor, where an integrity manager dynamically generates and executes integrity kernels to test various paths of the application processor, identifying faults and providing transparent integrity services without requiring application-level monitoring functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-core SoC devices with highly-integrated architecture are used, then system performance is improved, but device complexity and difficulty of detecting and measuring faults increase

Engineering Contradiction:
Improvesystem performanceVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system is segmented into two distinct processor domains: an application processor domain for executing user applications and an integrity processor domain for monitoring and verifying computation integrity. This segmentation allows the application processor to operate at high performance while the integrity processor independently verifies results, resolving the contradiction by separating performance-critical operations from verification operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An integrity manager acts as an intermediary between the application processor and the integrity monitoring mechanism. It dynamically generates integrity kernels, manages the integrity testing process, and coordinates fault detection activities, thereby simplifying the complexity of directly monitoring multi-core SoC operations while maintaining high performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multi-core SoC devices with internal scheduling are used, then system performance is improved, but reliability and ease of operation for integrity monitoring deteriorate

Engineering Contradiction:
Improvesystem performanceVSAvoidintegrity monitoring reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The integrity manager dynamically generates integrity kernels in advance and provides them to the integrity processor before the application processor executes critical computations. This preliminary preparation allows the integrity processor to be ready for verification, ensuring reliable monitoring without impacting the performance of the application processor.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where the integrity processor executes integrity kernels, compares results with expected outcomes, and reports faults back to the integrity manager. This closed-loop feedback ensures that any deviations from expected behavior are detected and reported, maintaining high reliability even with complex internal scheduling in multi-core SoC devices.

Inventive Principle:
Principle #23Feedback

3Ease of operation

If transparent integrity monitoring is implemented, then ease of operation is improved, but device complexity increases

Engineering Contradiction:
Improvetransparent monitoringVSAvoidintegrity monitoring architecture
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The integrity monitoring functionality is extracted from the application processor and implemented as a separate integrity processor domain. This extraction makes the monitoring transparent to application software, as applications do not need to be modified to include monitoring code, while the complexity of the monitoring architecture is isolated in the dedicated integrity processor.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The integrity processor executes copies of integrity kernels that mirror the computation logic of the application processor. By running identical or equivalent computational paths in the integrity domain and comparing results, the system achieves transparent monitoring without requiring complex instrumentation of the application processor itself.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10242179B1High-integrity multi-core heterogeneous processing environments
Publication Date: 2019.03.26 ROCKWELL COLLINS INC
  • US10242179B1 patent drawing
  • US10242179B1 patent drawing

AI summary

A high-integrity multi-core heterogeneous processing environment and methods for high integrity computing on multi-core heterogeneous processing environments are disclosed. A multi-core heterogeneous processing environment may include an application processor with one or more processing cores and an integrity tester for executing integrity kernels on the application processor. The multi-core heterogeneous processing environment may further include an integrity processor having a different architecture than the application processor and an integrity manager operating on the integrity processor. The integrity manager may dynamically generate integrity kernels to test the functionality of the application processor prior to and/or subsequent to the execution of critical programs on the application processor. The integrity manager may identify one or more faults based on a result of the integrity kernel executed on the application processor and may further take corrective action based on identified faults such that an undetected fault rate remains below a selected integrity specification.