In-Vehicle Inter-Core Communication via Segmented DMA Buffer
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Solution Overview
Problem
Multicore microcomputers face inefficiencies in inter-core communication, leading to processing delays and varying throughput due to the need for sharing information between cores, which complicates the implementation of safety integrity levels (ASIL) and may not ensure data integrity during communication between different safety levels.
Innovation Solution
Implementing a configuration with separate memory regions for each core, using a memory protection unit (MPU) to enforce access restrictions and employing direct memory access (DMA) for data transfer between cores, allowing user-controlled inter-core communication while minimizing processing load and ensuring safety across different ASIL levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If inter-core communication is implemented in multicore microcomputer, then information sharing between cores is enabled, but processing delay occurs and throughput decreases
Solution Approach 1:
A communication buffer is introduced as an intermediary component between cores to enable asynchronous data transfer. The buffer stores data temporarily, allowing one core to write data while another core reads it at a different time, eliminating the need for synchronous coordination and reducing processing delays.
Solution Approach 2:
Data is copied between cores through the communication buffer rather than requiring direct core-to-core interaction. This copying mechanism allows independent core operation while maintaining data sharing capability, preventing one core from waiting on another core's processing status.
2Reliability
If OS-controlled inter-core communication is used, then safety levels can be managed, but processing load increases and communication timing cannot be guaranteed
Solution Approach 1:
The communication buffer is segmented into multiple regions, each dedicated to specific ASIL levels. This segmentation allows direct memory access between cores of different safety levels without requiring OS intervention, reducing processing load while maintaining safety compliance through physical isolation of safety-critical data paths.
3Reliability
If data is transferred between cores of different ASIL levels, then functional safety requirements can be met, but data integrity cannot be ensured
Solution Approach 1:
Different regions of the communication buffer are assigned different quality attributes corresponding to ASIL levels. High-ASIL regions implement stricter data validation and protection mechanisms, while lower-ASIL regions use simpler protocols. This local quality differentiation ensures data integrity in safety-critical paths without unnecessarily complicating non-critical communication.
Data Source
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AI summary
Provided is an in-vehicle control device which allows the giving and receiving of data via inter-core communication at the timing of a user, as well as being capable of minimizing processing load while satisfying safety requirements of different (lowest to highest) functional safety levels (ASIL) in the inter-core communication of a multicore microcomputer. The data communication between a plurality of cores (2, 3) is performed by a writing means for writing the data of a core register (11) into a region (8) of a shared memory (7) of the cores, where safety levels are set, using a hardware function (DMA or the like) . The cores (2, 3) have different functional safety levels.