Inter-layer Slot for PCB Power Plane Coupling
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Solution Overview
Problem
Current printed circuit boards (PCBs) face significant power loss and heat generation due to high electrical resistance between conductive layers, particularly when using multiple power planes, which limits the effectiveness of power distribution to high-power processors.
Innovation Solution
The introduction of an inter-layer slot with electrically conductive material through an insulating layer to couple voltage planes, providing a larger cross-sectional area connection that reduces electrical resistance compared to traditional microvias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple power planes are used to distribute current, then power distribution capability is improved, but electrical resistance between layers increases due to microvias
Solution Approach 1:
The invention divides the connection path between power planes into multiple parallel microvia segments, increasing the total cross-sectional area for current flow. Multiple microvias are arranged in arrays or grids between power planes, creating parallel current paths that reduce overall electrical resistance while maintaining the multi-plane power distribution architecture.
Solution Approach 2:
The invention transitions from single-point or single-line connections between power planes to two-dimensional arrays of microvias. By distributing microvias across a planar area between power planes, the connection geometry evolves from one-dimensional traces to two-dimensional connection matrices, significantly increasing the effective cross-sectional area for current flow and reducing electrical resistance.
2Loss of energy
If more power planes are added to reduce IR drop, then power efficiency is improved, but PCB thickness and manufacturing complexity increase
Solution Approach 1:
Instead of adding more power planes, the invention segments the connection path into multiple parallel microvia channels. This approach achieves reduced IR drop by increasing the number of parallel current paths within existing layers, avoiding the need to add new power planes and the associated manufacturing complexity.
Solution Approach 2:
The invention changes the geometric parameters of the connection structure by using arrays of microvias with optimized spacing, diameter, and distribution patterns. By adjusting these parameters, the effective cross-sectional area for current flow is increased without changing the fundamental multi-layer PCB structure, thus reducing IR drop without proportionally increasing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly reduces power loss and heat generation by minimizing electrical resistance between voltage planes, enhancing power efficiency and processing speed in high-power processor systems.
Implementation Method 1
an inter-layer slot that is formed through the first electrically insulating layer and includes an electrically conductive material electrically couples the first voltage plane to the second voltage plane
Implementation Method 2
This design significantly reduces power loss and heat generation by minimizing electrical resistance between voltage planes
Data Source
AI summary
A printed circuit board includes a first voltage plane disposed on a first surface of a first electrically insulating layer and a second voltage plane. An inter-layer slot that is formed through the first electrically insulating layer and includes an electrically conductive material electrically couples the first voltage plane to the second voltage plane.


