Inter-OS Memory Access via Communication Unit

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing information processing systems face challenges in efficiently managing memory resources between different operating systems in a loosely coupled multi-processor environment, particularly in balancing real-time processing demands and virtual memory functions across separate CPU and memory areas.

Innovation Solution

The system employs a configuration with a first central processing unit operating under a general-purpose OS with virtual memory capabilities and a second CPU operating under a real-time OS, utilizing an inter-OS communication unit to manage memory access requests, allowing for virtual memory expansion and efficient data swapping between memory areas controlled by each OS.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a general-purpose OS with virtual memory function is used on the first CPU, then virtual memory capacity is expanded, but real-time processing capability deteriorates

Engineering Contradiction:
Improvevirtual memory capacityVSAvoidreal-time processing capability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The system divides the computer into two independent parts: a first CPU running a general-purpose OS for virtual memory management, and a second CPU running a real-time OS for real-time processing. This segmentation allows each CPU to specialize in one function, resolving the contradiction between virtual memory capacity and real-time processing capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A communication unit acts as an intermediary between the first OS and second OS, managing memory access requests and data transfer. This intermediary enables the first CPU to handle virtual memory operations while the second CPU maintains real-time processing, as the communication unit coordinates their interactions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If memory is separated into first and second memory areas for different OSs, then real-time processing is maintained, but memory resource sharing efficiency deteriorates

Engineering Contradiction:
Improvereal-time processingVSAvoidmemory resource sharing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The communication unit serves as an intermediary that manages memory access requests between the two OSs. When the first OS needs to access the second memory area, it sends requests through the communication unit, which forwards them to the second OS. This maintains real-time processing while enabling controlled resource sharing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The second memory area, initially dedicated to the real-time OS, also serves as virtual memory for the first OS. This multi-functionality allows the same memory resource to serve both real-time processing and virtual memory expansion, improving resource sharing efficiency without compromising real-time performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If the first OS accesses the second memory area directly, then processing speed improves, but real-time processing reliability deteriorates

Engineering Contradiction:
Improveprocessing speedVSAvoidreal-time processing reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The communication unit acts as an intermediary that the first OS must use to access the second memory area. Instead of direct access, the first OS sends memory access requests through the communication unit, which then communicates with the second OS. This indirect access method maintains real-time processing reliability while still enabling processing speed improvement through efficient request handling.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9594701B2Information processing apparatus, information processing method, and non-transitory computer readable medium
Publication Date: 2017.03.14 FUJIFILM BUSINESS INNOVATION CORP
  • US9594701B2 patent drawing
  • US9594701B2 patent drawing
  • US9594701B2 patent drawing

AI summary

An information processing apparatus includes first and second central processing units, a communication unit, and a memory. The first and second central processing units operate based on first and second operating systems, respectively. The communication unit controls communication between the first and second operating systems. The memory includes first and second memory areas used respectively by the first and second operating systems. The first operating system includes a memory access requesting unit. The memory access requesting unit sends, to the second operating system via the communication unit, a request to write information to be moved from the first memory area to a virtual memory and a request to read information to be moved from the virtual memory to the first memory area. The second operating system writes to and reads from the second memory area, the information indicated by the write and read requests, respectively.