Inter-SoC Time Synchronization Using Modified PTP Messages

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Solution Overview

Problem

Existing systems on a chip (SoCs) in electronic devices face challenges in synchronizing their independent time bases due to varying transmission delays, which affect the alignment of processing workloads and overall device performance.

Innovation Solution

A modified Precision Time Protocol (PTP) technique is employed to synchronize two SoCs by periodically sending time synchronization messages through an inter-SoC interface, allowing the secondary SoC to calculate a time offset using a master clock timestamp and transmission delay, and aligning time bases by averaging multiple offsets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If independent time bases are used in multiple SoCs, then each SoC can operate autonomously, but time synchronization between SoCs deteriorates due to varying transmission delays

Engineering Contradiction:
Improveautonomous operationVSAvoidtime synchronization
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The system implements a feedback mechanism where the secondary SoC measures the transmission delay by comparing its local timestamp with the master timestamp from the primary SoC. This delay measurement is fed back into the synchronization calculation to compensate for variable transmission delays, thereby maintaining precise time synchronization while preserving autonomous operation of each SoC.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts the time offset parameter based on measured transmission delays. By continuously updating the offset parameter using the formula: offset = local_timestamp - (master_timestamp - measured_delay), the system adapts to varying transmission conditions while maintaining synchronization accuracy.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If transmission delay compensation is implemented, then time synchronization precision improves, but system complexity increases due to additional calculation requirements

Engineering Contradiction:
Improvetime synchronizationVSAvoidsynchronization mechanism
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The secondary SoC performs self-service by autonomously measuring its own transmission delay using its local timestamp and comparing it with the received master timestamp. This self-measured delay is then used to compensate for transmission variations without requiring complex external intervention or additional hardware, thereby improving synchronization precision while limiting complexity growth.

Inventive Principle:
Principle #25Self-service

3Stability of the object's composition

If multiple time offsets are averaged, then synchronization stability improves, but processing time increases

Engineering Contradiction:
Improvesynchronization stabilityVSAvoidsynchronization processing time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The system applies partial averaging by using a limited number of recent time offset measurements rather than averaging all historical data. This approach provides sufficient stabilization of the synchronization by smoothing out short-term variations while avoiding the excessive processing time that would result from comprehensive historical averaging, thus achieving a balance between stability and processing efficiency.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250358031A1Synchronizing systems on a chip using time synchronization messages
Publication Date: 2025.11.20 SNAP INC
  • US20250358031A1 patent drawing
  • US20250358031A1 patent drawing
  • US20250358031A1 patent drawing

AI summary

An electronic eyewear device includes first and second systems on a chip (SoCs) having independent time bases and an inter-SoC interface that connects the first and second SoCs. The operations of the first and second SoCs are synchronized by aligning the time bases for the SoCs using a modified PTP technique. The technique includes the second SoC receiving a time synchronization message from the first SoC over the inter-SoC interface, recording a local timestamp of receipt of the time synchronization message, receiving a master timestamp corresponding to a timestamp recorded by the first SoC corresponding to the time of sending the time synchronization message by the first SoC, and calculating a time offset between the local timestamp and the master timestamp. The time bases of the first SoC and second SoC are then aligned using the calculated time offset. To account for transmission delays, multiple time offsets may be averaged.