Interconnect Adhesion Layer Crystallinity for Electro-Migration Reduction
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Solution Overview
Problem
Existing interconnect structures in semiconductor ICs face challenges with electro-migration, particularly due to poor adhesion between capping barrier layers and conductive features, leading to voids, hillocks, and defects that accelerate electro-migration, affecting device performance and lifetime.
Innovation Solution
A method is introduced to improve adhesion by selectively depositing an adhesion layer on the dielectric layer and annealing it to increase crystallinity, which enhances the adhesion between the capping barrier layer and the dielectric layer, thereby reducing electro-migration-related defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a capping barrier layer is deposited over the conductive feature and dielectric layer, then protection against electro-migration is improved, but adhesion between the capping barrier layer and dielectric layer deteriorates, leading to voids and hillocks
Solution Approach 1:
An adhesion layer is introduced as an intermediary between the dielectric layer and the capping barrier layer. This adhesion layer specifically addresses the poor adhesion problem by providing a bonding interface that prevents voids and hillocks, while allowing the capping barrier layer to maintain its electro-migration protection function.
Solution Approach 2:
The structure employs composite materials by combining the dielectric layer, adhesion layer, and capping barrier layer into a multi-layer composite structure. Each layer contributes specific properties: the dielectric layer provides insulation, the adhesion layer provides bonding strength, and the capping barrier layer provides electro-migration protection, together resolving the contradiction between protection and adhesion.
2Strength
If the adhesion layer is deposited to improve adhesion, then adhesion between capping barrier layer and dielectric layer is improved, but the device complexity increases due to additional processing steps
Solution Approach 1:
The deposition of the adhesion layer is merged with the existing deposition process sequence by integrating it into the atomic layer deposition (ALD)工艺流程. The adhesion layer deposition is combined with the dielectric layer formation process, allowing both layers to be deposited in a single processing cycle, thereby minimizing additional complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved adhesion structure effectively reduces voids, hillocks, and defects, leading to enhanced device reliability and performance by minimizing electro-migration, thus addressing the limitations of existing interconnect structures.
Implementation Method 1
annealing it to increase crystallinity
Implementation Method 2
selectively depositing an adhesion layer on the dielectric layer
Data Source
AI summary
The present disclosure provides a structure and a method to reduce electro-migration. An interconnect structure according to the present disclosure includes a conductive feature embedded in a dielectric layer, a capping barrier layer disposed over the conductive feature and the dielectric layer, and an adhesion layer sandwiched between the capping barrier layer and the dielectric layer. The adhesion layer includes a degree of crystallinity between about 40% and about 70%.