Interconnect Air Gap Seal to Prevent Via Metal Infiltration
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Solution Overview
Problem
The integration of air gaps in interconnects of integrated circuits (ICs) faces challenges in maintaining integrity during subsequent processing, leading to degradation of capacitance reduction and increased resistance-capacitance (RC) delay, due to misalignment and metal infiltration issues during via formation.
Innovation Solution
A method for fabricating an air gap seal by selectively depositing an air gap seal material, such as amorphous silicon, on the contact isolation layer without depositing it on the insulating layer, which preserves the air gap integrity and prevents metal infiltration, thereby reducing capacitance and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If air gaps are integrated in interconnects to reduce capacitance, then capacitance reduction is achieved, but air gap integrity degrades during subsequent processing leading to metal infiltration
Solution Approach 1:
A seal structure is formed at the interface between the air gap and surrounding dielectric material before subsequent via formation processing. This preliminary sealing action prevents metal infiltration during later processing steps, maintaining air gap integrity while preserving capacitance reduction benefits.
Solution Approach 2:
The seal structure acts as an intermediary barrier between the air gap and the surrounding dielectric material. This intermediate layer prevents direct contact and potential infiltration of metal during via formation, thereby protecting the air gap integrity without compromising the capacitance reduction effect.
2Reliability
If air gaps are integrated in interconnects to reduce capacitance, then capacitance reduction is achieved, but misalignment during via formation causes metal infiltration
Solution Approach 1:
The seal structure is formed in advance at the air gap interface before via formation processing. This preliminary sealing creates a protective barrier that compensates for potential misalignment during subsequent via formation, preventing metal infiltration even when alignment is not perfect.
Solution Approach 2:
The seal structure serves as a cushioning protective layer formed beforehand at the air gap boundary. This preliminary protection absorbs the impact of potential misalignment during via formation, preventing metal from infiltrating the air gap while maintaining the capacitance reduction benefit.
3Stability of the object's composition
If seal structures are added to protect air gaps, then air gap integrity is maintained, but device complexity increases
Solution Approach 1:
The seal structure is formed using the same deposition process and materials as the surrounding dielectric layers, making it multi-functional. It serves both as part of the dielectric structure and as a protective seal for the air gap, thereby maintaining air gap integrity without significantly increasing device complexity.
Solution Approach 2:
The seal structure is merged with the existing dielectric layer formation process. By combining the sealing function with the dielectric deposition step, the patent avoids adding separate complex processing steps, thereby maintaining air gap integrity while minimizing increases in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method effectively reduces RC delay by maintaining the air gap integrity, ensuring reliable capacitance and resistance reduction, even under misalignment and over-size interconnect conditions, enhancing the performance of ICs.
Implementation Method 1
selectively depositing an air gap seal material, such as amorphous silicon, on the contact isolation layer without depositing it on the insulating layer
Data Source
AI summary
Interconnects that facilitate reduced capacitance and/or resistance and corresponding techniques for forming the interconnects are disclosed herein. An exemplary interconnect is disposed in an insulating layer. The interconnect has a metal contact, a contact isolation layer surrounding sidewalls of the metal contact, and an air gap disposed between the contact isolation layer and the insulating layer. An air gap seal for the air gap has a first portion disposed over a top surface of the contact isolation layer, but not disposed on a top surface of the insulating layer, and a second portion disposed between the contact isolation layer and the insulating layer, such that the second portion surrounds a top portion of sidewalls of the metal contact. The air gap seal may include amorphous silicon and/or silicon oxide. The contact isolation layer may include silicon nitride. The insulating layer may include silicon oxide.


