Interconnect Barrier Layer Structure for Metal Diffusion Blocking

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Solution Overview

Problem

In semiconductor devices, metal diffusion through multiple barrier layers poses challenges, affecting the performance and reliability of interconnect structures, particularly in preventing metal elements from conductive lines from reaching the pad layer.

Innovation Solution

A multi-layer barrier structure comprising nano-crystalline, amorphous, and poly-crystalline tantalum or titanium nitride layers is formed conformally around conductive lines to prevent metal diffusion, with specific thickness ratios and deposition techniques ensuring effective blocking of metal elements during thermal processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple barrier layers are used to prevent metal diffusion, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvemetal diffusion preventionVSAvoidmulti-layer barrier structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The barrier layer is segmented into multiple distinct layers with different crystal phases (amorphous, nano-crystalline, poly-crystalline) and compositions. Each layer serves as an independent barrier against metal diffusion, creating a multi-stage defense system that blocks metal elements at multiple interfaces, thereby enhancing overall reliability through layered protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The barrier structure employs composite materials combining different tantalum-based compounds (tantalum nitride, tantalum oxide, tantalum oxynitride) in specific phases and ratios. This composite approach leverages the complementary properties of each material phase to achieve superior metal diffusion resistance that cannot be obtained with a single material system.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If conformal barrier layers with specific thickness ratios are deposited, then manufacturing precision is improved, but ease of manufacture deteriorates

Engineering Contradiction:
Improvebarrier layer thickness controlVSAvoidmulti-step deposition process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The invention specifies precise thickness parameters for each barrier layer (first layer: 5-20 nm, second layer: 20-50 nm, third layer: 50-100 nm) and controls the ratio between them. By defining specific parameter ranges and ratios, the patent achieves controlled metal diffusion blocking while providing clear manufacturing guidelines that balance precision requirements with process feasibility.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The barrier layers are deposited conformally on the conductive lines before subsequent processing steps. This preliminary formation of the multi-layer barrier structure ensures that metal diffusion prevention is established early in the manufacturing sequence, preventing contamination during later high-temperature or metal-deposition processes.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The multi-layer barrier structure significantly reduces the failure rate of semiconductor structures by effectively blocking metal diffusion to the pad layer, maintaining electrical performance and reliability.

Implementation Method 1

A multi-layer barrier structure comprising nano-crystalline, amorphous, and poly-crystalline tantalum or titanium nitride layers is formed conformally around conductive lines to prevent metal diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

with specific thickness ratios and deposition techniques ensuring effective blocking of metal elements during thermal processes

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 3

with specific thickness ratios and deposition techniques ensuring effective blocking of metal elements during thermal processes

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS11978703B2Semiconductor structure
Publication Date: 2024.05.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11978703B2 patent drawing
  • US11978703B2 patent drawing
  • US11978703B2 patent drawing

AI summary

A semiconductor structure includes a conductive line, a pad layer, and a barrier layer. The conductive line is embedded in a multi-level interconnect structure. The pad layer is over the conductive line. The barrier layer is between the conductive line and the pad layer. The pad layer is electrically connected to the conductive line through the barrier layer, and the barrier layer includes a first poly-crystalline layer and a second poly-crystalline layer. A boundary is between the first poly-crystalline layer and the second poly-crystalline layer.