Interconnect Barrier Layer Structure for Blocking Pad Metal Diffusion

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Solution Overview

Problem

In semiconductor manufacturing, metal diffusion through multiple barrier layers poses challenges, affecting the performance and reliability of interconnect structures, particularly in preventing metal elements from conductive lines from reaching the pad layer.

Innovation Solution

A multi-layer barrier structure comprising nano-crystalline, amorphous, and poly-crystalline tantalum or titanium nitride layers is conformally deposited to prevent metal diffusion, with specific thickness ratios and phases aligning threading dislocation defects to block metal passage effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple barrier layers are used to prevent metal diffusion, then the reliability of the semiconductor structure is improved, but the complexity of the manufacturing process increases

Engineering Contradiction:
Improvemetal diffusion preventionVSAvoidmulti-layer barrier structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a composite barrier structure consisting of multiple layers with different materials (e.g., titanium nitride, tantalum nitride, tungsten silicide) and crystalline phases (nano-crystalline, amorphous, poly-crystalline). Each layer contributes different properties to the overall barrier system, creating a synergistic effect that enhances metal diffusion prevention while managing process complexity through systematic material selection.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent applies different material compositions and crystalline phases to specific positions within the barrier structure. For example, nano-crystalline layers are positioned at interfaces where metal diffusion is most problematic, while amorphous layers provide continuous coverage. This localized optimization allows effective diffusion blocking without requiring uniform complexity throughout the entire structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If the barrier layer thickness is increased to block metal diffusion, then the reliability is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvemetal diffusion preventionVSAvoidlayer thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent divides the barrier function into multiple discrete layers rather than using a single thick layer. Each layer has an optimized thickness (e.g., 5-20 nm per layer) that is easier to control with standard deposition processes. The cumulative thickness achieves the required diffusion blocking while individual layer thicknesses remain within manufacturable tolerances.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes changes in crystalline phase (nano-crystalline, amorphous, poly-crystalline) and material composition to enhance barrier effectiveness at reduced thicknesses. These parameter changes alter the diffusion pathways and energy barriers, allowing thinner layers to achieve the same or better protection than thicker conventional layers, thereby reducing manufacturing precision demands.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces the failure rate of semiconductor structures by effectively blocking metal diffusion to the pad layer, ensuring enhanced electrical performance and reliability.

Implementation Method 1

A multi-layer barrier structure comprising nano-crystalline, amorphous, and poly-crystalline tantalum or titanium nitride layers is conformally deposited to prevent metal diffusion

Methodology Applied
Scientific EffectConformal deposition: Physical Vapour Deposition

Implementation Method 2

with specific thickness ratios and phases aligning threading dislocation defects to block metal passage effectively

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS20240290721A1Method for forming semiconductor structure
Publication Date: 2024.08.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240290721A1 patent drawing
  • US20240290721A1 patent drawing
  • US20240290721A1 patent drawing

AI summary

A semiconductor structure includes a conductive line, a pad layer, and a barrier layer. The conductive line is embedded in a multi-level interconnect structure. The pad layer is over the conductive line. The barrier layer is between the conductive line and the pad layer. The pad layer is electrically connected to the conductive line through the barrier layer, and the barrier layer includes a first poly-crystalline layer and a second poly-crystalline layer. A boundary is between the first poly-crystalline layer and the second poly-crystalline layer.