Interconnect Capping Structure for Low-Resistance Via Contact

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Solution Overview

Problem

The miniaturization of interconnect structures in semiconductor devices leads to increased current density, causing electromigration issues that can result in IC failure, while metallic capping layers used to mitigate this introduce extra resistance and degrade performance.

Innovation Solution

The interconnect structure includes a metal wire with a metallic capping layer and a via conductor layer that contacts the metal wire by removing portions of the capping layer, reducing contact resistance and incorporating an insulating layer over the metal wire and capping layer to form the via conductor through, thereby lowering resistance and signal delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metallic capping layer is added to mitigate electromigration, then reliability is improved, but resistance increases and performance degrades

Engineering Contradiction:
Improveelectromigration resistanceVSAvoidresistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The capping layer is segmented into discrete metallic capping portions rather than a continuous layer. Each capping portion is positioned at specific locations along the interconnect wire where electromigration is most severe, allowing the structure to provide protection where needed while maintaining low resistance in other segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The metallic capping portions are applied locally at specific positions along the interconnect wire rather than as a uniform continuous layer. This local application provides electromigration protection at critical locations while minimizing the overall resistance impact on the interconnect structure.

Inventive Principle:
Principle #3Local quality

2Productivity

If interconnect structures are miniaturized to increase storage capacity and processing speed, then productivity is improved, but current density increases causing electromigration issues

Engineering Contradiction:
Improvestorage capacity and processing speedVSAvoidelectromigration resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The continuous capping layer is divided into multiple discrete metallic capping portions distributed along the interconnect wire. This segmentation allows the structure to provide targeted electromigration protection in miniaturized interconnects without significantly increasing overall resistance, enabling continued scaling while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Metallic capping portions are strategically positioned at locations where electromigration is most likely to occur in miniaturized interconnect structures, providing localized protection that addresses the reliability issues caused by high current density in scaled-down devices.

Inventive Principle:
Principle #3Local quality

3Loss of energy

If via conductor layer removes portions of capping layer to contact metal wire, then contact resistance is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvecontact resistanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The metallic capping portions are formed with predetermined openings or gaps during the deposition process, allowing the via conductor layer to directly contact the metal wire without requiring additional removal steps. This preliminary structuring simplifies the manufacturing process while maintaining low contact resistance.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250105147A1Low resistance interconnect structure for semiconductor device
Publication Date: 2025.03.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250105147A1 patent drawing
  • US20250105147A1 patent drawing
  • US20250105147A1 patent drawing

AI summary

The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.